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[Qemu-devel] [PATCH 6/9] target-ppc: use the new bswap* TCG ops
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 6/9] target-ppc: use the new bswap* TCG ops |
Date: |
Wed, 11 Mar 2009 13:51:04 +0100 |
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-ppc/translate.c | 129 ++++++------------------------------------------
1 files changed, 15 insertions(+), 114 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d30bd35..952ee99 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2580,35 +2580,16 @@ static always_inline void gen_qemu_ld16u(DisasContext
*ctx, TCGv arg1, TCGv arg2
{
tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
if (unlikely(ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap16_i32(t0, t0);
- tcg_gen_extu_i32_tl(arg1, t0);
- tcg_temp_free_i32(t0);
-#else
- tcg_gen_bswap16_i32(arg1, arg1);
-#endif
+ tcg_gen_bswap16_tl(arg1, arg1);
}
}
static always_inline void gen_qemu_ld16s(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (unlikely(ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0;
tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap16_i32(t0, t0);
- tcg_gen_extu_i32_tl(arg1, t0);
+ tcg_gen_bswap16_tl(arg1, arg1);
tcg_gen_ext16s_tl(arg1, arg1);
- tcg_temp_free_i32(t0);
-#else
- tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
- tcg_gen_bswap16_i32(arg1, arg1);
- tcg_gen_ext16s_i32(arg1, arg1);
-#endif
} else {
tcg_gen_qemu_ld16s(arg1, arg2, ctx->mem_idx);
}
@@ -2618,15 +2599,7 @@ static always_inline void gen_qemu_ld32u(DisasContext
*ctx, TCGv arg1, TCGv arg2
{
tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
if (unlikely(ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap32_i32(t0, t0);
- tcg_gen_extu_i32_tl(arg1, t0);
- tcg_temp_free_i32(t0);
-#else
- tcg_gen_bswap32_i32(arg1, arg1);
-#endif
+ tcg_gen_bswap32_tl(arg1, arg1);
}
}
@@ -2634,13 +2607,9 @@ static always_inline void gen_qemu_ld32u(DisasContext
*ctx, TCGv arg1, TCGv arg2
static always_inline void gen_qemu_ld32s(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (unlikely(ctx->le_mode)) {
- TCGv_i32 t0;
tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap32_i32(t0, t0);
- tcg_gen_ext_i32_tl(arg1, t0);
- tcg_temp_free_i32(t0);
+ tcg_gen_bswap32_tl(arg1, arg1);
+ tcg_gen_ext32s_tl(arg1, arg1);
} else
tcg_gen_qemu_ld32s(arg1, arg2, ctx->mem_idx);
}
@@ -2662,25 +2631,11 @@ static always_inline void gen_qemu_st8(DisasContext
*ctx, TCGv arg1, TCGv arg2)
static always_inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (unlikely(ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0;
- TCGv t1;
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_ext16u_i32(t0, t0);
- tcg_gen_bswap16_i32(t0, t0);
- t1 = tcg_temp_new();
- tcg_gen_extu_i32_tl(t1, t0);
- tcg_temp_free_i32(t0);
- tcg_gen_qemu_st16(t1, arg2, ctx->mem_idx);
- tcg_temp_free(t1);
-#else
TCGv t0 = tcg_temp_new();
tcg_gen_ext16u_tl(t0, arg1);
- tcg_gen_bswap16_i32(t0, t0);
+ tcg_gen_bswap16_tl(t0, t0);
tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx);
tcg_temp_free(t0);
-#endif
} else {
tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx);
}
@@ -2689,23 +2644,11 @@ static always_inline void gen_qemu_st16(DisasContext
*ctx, TCGv arg1, TCGv arg2)
static always_inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (unlikely(ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0;
- TCGv t1;
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap32_i32(t0, t0);
- t1 = tcg_temp_new();
- tcg_gen_extu_i32_tl(t1, t0);
- tcg_temp_free_i32(t0);
- tcg_gen_qemu_st32(t1, arg2, ctx->mem_idx);
- tcg_temp_free(t1);
-#else
- TCGv t0 = tcg_temp_new_i32();
- tcg_gen_bswap32_i32(t0, arg1);
+ TCGv t0 = tcg_temp_new();
+ tcg_gen_ext32u_tl(t0, arg1);
+ tcg_gen_bswap32_tl(t0, t0);
tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx);
tcg_temp_free(t0);
-#endif
} else {
tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx);
}
@@ -2993,15 +2936,7 @@ static void always_inline gen_qemu_ld16ur(DisasContext
*ctx, TCGv arg1, TCGv arg
{
tcg_gen_qemu_ld16u(arg1, arg2, ctx->mem_idx);
if (likely(!ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap16_i32(t0, t0);
- tcg_gen_extu_i32_tl(arg1, t0);
- tcg_temp_free_i32(t0);
-#else
- tcg_gen_bswap16_i32(arg1, arg1);
-#endif
+ tcg_gen_bswap16_tl(arg1, arg1);
}
}
GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
@@ -3011,15 +2946,7 @@ static void always_inline gen_qemu_ld32ur(DisasContext
*ctx, TCGv arg1, TCGv arg
{
tcg_gen_qemu_ld32u(arg1, arg2, ctx->mem_idx);
if (likely(!ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap32_i32(t0, t0);
- tcg_gen_extu_i32_tl(arg1, t0);
- tcg_temp_free_i32(t0);
-#else
- tcg_gen_bswap32_i32(arg1, arg1);
-#endif
+ tcg_gen_bswap32_tl(arg1, arg1);
}
}
GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
@@ -3028,25 +2955,11 @@ GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
static void always_inline gen_qemu_st16r(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (likely(!ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0;
- TCGv t1;
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_ext16u_i32(t0, t0);
- tcg_gen_bswap16_i32(t0, t0);
- t1 = tcg_temp_new();
- tcg_gen_extu_i32_tl(t1, t0);
- tcg_temp_free_i32(t0);
- tcg_gen_qemu_st16(t1, arg2, ctx->mem_idx);
- tcg_temp_free(t1);
-#else
TCGv t0 = tcg_temp_new();
tcg_gen_ext16u_tl(t0, arg1);
- tcg_gen_bswap16_i32(t0, t0);
+ tcg_gen_bswap16_tl(t0, t0);
tcg_gen_qemu_st16(t0, arg2, ctx->mem_idx);
tcg_temp_free(t0);
-#endif
} else {
tcg_gen_qemu_st16(arg1, arg2, ctx->mem_idx);
}
@@ -3057,23 +2970,11 @@ GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
static void always_inline gen_qemu_st32r(DisasContext *ctx, TCGv arg1, TCGv
arg2)
{
if (likely(!ctx->le_mode)) {
-#if defined(TARGET_PPC64)
- TCGv_i32 t0;
- TCGv t1;
- t0 = tcg_temp_new_i32();
- tcg_gen_trunc_tl_i32(t0, arg1);
- tcg_gen_bswap32_i32(t0, t0);
- t1 = tcg_temp_new();
- tcg_gen_extu_i32_tl(t1, t0);
- tcg_temp_free_i32(t0);
- tcg_gen_qemu_st32(t1, arg2, ctx->mem_idx);
- tcg_temp_free(t1);
-#else
- TCGv t0 = tcg_temp_new_i32();
- tcg_gen_bswap32_i32(t0, arg1);
+ TCGv t0 = tcg_temp_new();
+ tcg_gen_ext32u_tl(t0, arg1);
+ tcg_gen_bswap32_tl(t0, t0);
tcg_gen_qemu_st32(t0, arg2, ctx->mem_idx);
tcg_temp_free(t0);
-#endif
} else {
tcg_gen_qemu_st32(arg1, arg2, ctx->mem_idx);
}
--
1.6.1.3
- [Qemu-devel] [PATCH 0/9] tcg: reorganize bswap* functions, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 2/9] tcg: allow bswap16_i32 to be implemented by TCG backends, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 4/9] tcg: add _tl aliases to bswap16/32/64 TCG ops, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 5/9] tcg: update README wrt recent bswap changes, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 7/9] target-i386: use the new bswap* TCG ops, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 9/9] tcg/x86_64: add bswap16_i{32, 64} and bswap32_i64 ops, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 8/9] tcg/x86: add bswap16_i32 ops, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 3/9] tcg: add bswap16_i64 and bswap32_i64 TCG ops, Aurelien Jarno, 2009/03/11
- [Qemu-devel] [PATCH 6/9] target-ppc: use the new bswap* TCG ops,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 1/9] tcg: rename bswap_i32/i64 functions, Aurelien Jarno, 2009/03/11
- Re: [Qemu-devel] [PATCH 0/9] tcg: reorganize bswap* functions, Paul Brook, 2009/03/12