Re: [Qemu-devel] 4xx wrtee instructions

[Aurelien Jarno]

On Tue, Jan 13, 2009 at 04:04:18PM -0800, Andrew May wrote:
> When I try to boot a PPC 4xx linux kernel it fails somewhere after
> expanding the ramdisk with:
> "qemu: fatal: Trying to execute code outside RAM or ROM at 0xc007c70c"
> 
> It seems that the "wrteei" instruction is unsetting the address
> translate bits in the MSR. This patch seems to fix it, and I think it
> is correct, to and with the "not" of the bit instead of the bit itself
> to disable interrupts.
> 
> The qemu log file doesn't display the correct instructions, but that
> doesn't seem to be a problem.
> ====================
> IN: 
> 0xc000d0cc:  mfmsr      r5
> 0xc000d0d0:  mfspr      r6,945
> 0xc000d0d4:  .long 0x7c000146
> 0xc000d0d8:  mtspr      945,r4
> 0xc000d0dc:  .long 0x7c601f25
> 0xc000d0e0:  mtspr      945,r6
> 0xc000d0e4:  .long 0x7ca00106
> =======================
> 
> Please CC me since I am not on the list.
> 
> Here is the patch.
> ==========
> diff --git a/trunk/target-ppc/translate.c b/trunk/target-ppc/translate.c
> --- a/trunk/target-ppc/translate.c
> +++ b/trunk/target-ppc/translate.c
> @@ -6050,7 +6050,7 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, 
> PPC_WRTEE)
>          /* Stop translation to have a chance to raise an exception */
>          gen_stop_exception(ctx);
>      } else {
> -        tcg_gen_andi_tl(cpu_msr, cpu_msr, (1 << MSR_EE));
> +        tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE));
>      }
>  #endif
>  }
> 

Thanks, applied.

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