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[Qemu-devel] [PATCH 05/40] Add vavg{s,u}{b,h,w} instructions.


From: Nathan Froyd
Subject: [Qemu-devel] [PATCH 05/40] Add vavg{s,u}{b,h,w} instructions.
Date: Tue, 30 Dec 2008 19:09:47 -0800

Signed-off-by: Nathan Froyd <address@hidden>
---
 target-ppc/helper.h    |    7 +++++++
 target-ppc/op_helper.c |   19 +++++++++++++++++++
 target-ppc/translate.c |    7 +++++++
 3 files changed, 33 insertions(+), 0 deletions(-)

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index e69fceb..214bbf1 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -105,6 +105,13 @@ DEF_HELPER_3(vadduwm, void, avr, avr, avr)
 DEF_HELPER_3(vsububm, void, avr, avr, avr)
 DEF_HELPER_3(vsubuhm, void, avr, avr, avr)
 DEF_HELPER_3(vsubuwm, void, avr, avr, avr)
+DEF_HELPER_3(vavgub, void, avr, avr, avr)
+DEF_HELPER_3(vavguh, void, avr, avr, avr)
+DEF_HELPER_3(vavguw, void, avr, avr, avr)
+DEF_HELPER_3(vavgsb, void, avr, avr, avr)
+DEF_HELPER_3(vavgsh, void, avr, avr, avr)
+DEF_HELPER_3(vavgsw, void, avr, avr, avr)
+
 DEF_HELPER_1(efscfsi, i32, i32)
 DEF_HELPER_1(efscfui, i32, i32)
 DEF_HELPER_1(efscfuf, i32, i32)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 6d4bd1e..8f2508f 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -1988,6 +1988,25 @@ VARITH(uwm, u32)
 #undef VARITH_DO
 #undef VARITH
 
+#define VAVG_DO(name, element, etype)                                   \
+    void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)      \
+    {                                                                   \
+        int i;                                                          \
+        for (i = 0; i < ARRAY_SIZE(r->element); i++) {                  \
+            etype x = (etype)a->element[i] + (etype)b->element[i] + 1;  \
+            r->element[i] = x >> 1;                                     \
+        }                                                               \
+    }
+
+#define VAVG(type, signed_element, signed_type, unsigned_element, 
unsigned_type) \
+    VAVG_DO(avgs##type, signed_element, signed_type)                    \
+    VAVG_DO(avgu##type, unsigned_element, unsigned_type)
+VAVG(b, s8, int16_t, u8, uint16_t)
+VAVG(h, s16, int32_t, u16, uint32_t)
+VAVG(w, s32, int64_t, u32, uint64_t)
+#undef VAVG_DO
+#undef VAVG
+
 #undef VECTOR_FOR_INORDER_I
 #undef HI_IDX
 #undef LO_IDX
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index a35ff1a..1ccd37e 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -6187,6 +6187,13 @@ GEN_VXFORM(vadduwm, 0, 2);
 GEN_VXFORM(vsububm, 0, 16);
 GEN_VXFORM(vsubuhm, 0, 17);
 GEN_VXFORM(vsubuwm, 0, 18);
+GEN_VXFORM(vavgub, 1, 16);
+GEN_VXFORM(vavguh, 1, 17);
+GEN_VXFORM(vavguw, 1, 18);
+GEN_VXFORM(vavgsb, 1, 20);
+GEN_VXFORM(vavgsh, 1, 21);
+GEN_VXFORM(vavgsw, 1, 22);
+
 /***                           SPE extension                               ***/
 /* Register moves */
 
-- 
1.6.0.5





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