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[Qemu-devel] [6122] Implement tick interrupt disable bits


From: Blue Swirl
Subject: [Qemu-devel] [6122] Implement tick interrupt disable bits
Date: Tue, 23 Dec 2008 08:47:27 +0000

Revision: 6122
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6122
Author:   blueswir1
Date:     2008-12-23 08:47:26 +0000 (Tue, 23 Dec 2008)

Log Message:
-----------
Implement tick interrupt disable bits

Modified Paths:
--------------
    trunk/hw/sun4u.c
    trunk/target-sparc/cpu.h

Modified: trunk/hw/sun4u.c
===================================================================
--- trunk/hw/sun4u.c    2008-12-22 21:06:23 UTC (rev 6121)
+++ trunk/hw/sun4u.c    2008-12-23 08:47:26 UTC (rev 6122)
@@ -57,6 +57,9 @@
 
 #define MAX_PILS 16
 
+#define TICK_INT_DIS         0x8000000000000000ULL
+#define TICK_MAX             0x7fffffffffffffffULL
+
 struct hwdef {
     const char * const default_cpu_model;
     uint16_t machine_id;
@@ -269,11 +272,14 @@
     CPUState *env = s->env;
 
     cpu_reset(env);
-    ptimer_set_limit(env->tick, 0x7fffffffffffffffULL, 1);
+    env->tick_cmpr = TICK_INT_DIS | 0;
+    ptimer_set_limit(env->tick, TICK_MAX, 1);
     ptimer_run(env->tick, 0);
-    ptimer_set_limit(env->stick, 0x7fffffffffffffffULL, 1);
+    env->stick_cmpr = TICK_INT_DIS | 0;
+    ptimer_set_limit(env->stick, TICK_MAX, 1);
     ptimer_run(env->stick, 0);
-    ptimer_set_limit(env->hstick, 0x7fffffffffffffffULL, 1);
+    env->hstick_cmpr = TICK_INT_DIS | 0;
+    ptimer_set_limit(env->hstick, TICK_MAX, 1);
     ptimer_run(env->hstick, 0);
     env->gregs[1] = 0; // Memory start
     env->gregs[2] = ram_size; // Memory size
@@ -286,24 +292,29 @@
 {
     CPUState *env = opaque;
 
-    env->softint |= SOFTINT_TIMER;
-    cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    if (!(env->tick_cmpr & TICK_INT_DIS)) {
+        env->softint |= SOFTINT_TIMER;
+        cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    }
 }
 
 static void stick_irq(void *opaque)
 {
     CPUState *env = opaque;
 
-    env->softint |= SOFTINT_TIMER;
-    cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    if (!(env->stick_cmpr & TICK_INT_DIS)) {
+        env->softint |= SOFTINT_STIMER;
+        cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    }
 }
 
 static void hstick_irq(void *opaque)
 {
     CPUState *env = opaque;
 
-    env->softint |= SOFTINT_TIMER;
-    cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    if (!(env->hstick_cmpr & TICK_INT_DIS)) {
+        cpu_interrupt(env, CPU_INTERRUPT_TIMER);
+    }
 }
 
 void cpu_tick_set_count(void *opaque, uint64_t count)

Modified: trunk/target-sparc/cpu.h
===================================================================
--- trunk/target-sparc/cpu.h    2008-12-22 21:06:23 UTC (rev 6121)
+++ trunk/target-sparc/cpu.h    2008-12-23 08:47:26 UTC (rev 6122)
@@ -330,7 +330,8 @@
     uint64_t hpstate, htstate[MAXTL_MAX], hintp, htba, hver, hstick_cmpr, ssr;
     void *hstick; // UA 2005
     uint32_t softint;
-#define SOFTINT_TIMER 1
+#define SOFTINT_TIMER   1
+#define SOFTINT_STIMER  (1 << 16)
 #endif
     sparc_def_t *def;
 } CPUSPARCState;






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