[Qemu-devel] [PATCH 4/4] LSI53C895A: Don't reset scratch C-R on soft reset

[Ryan Harper]

Debugging 64-bit Linux using the sym53c8xx_2/sym53c8xx.ko driver with
SYM_CONF_DMA_ADDRESSING_MODE=2 which uses 64-bit Table Indirect moves, I
encountered a situation where the initial probing of the scsi device succeded,
but after checking other LUNs besides LUN0, the device would fail to work.  This
was tracked down to the fact that the Linux driver programs one of the scratch
registers to contain the upper 32-bits of the target DMA address and since our
emulation doesn't support more than LUN0, it resets the scsi device which
results in clearing out the scratch registers.  The Linux driver was written
against real hardware which I think we can assume does not reset the scratch
registers, otherwise this driver would fail on real hardware as well.  As such,
avoiding resetting scratch registers C-R (ones that can be used for Table
Indirect 64-bit mode) fixes the issue for Linux.

Signed-off-by: Ryan Harper <address@hidden>

diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index b36c08c..542d5a0 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -276,7 +276,11 @@ static void lsi_soft_reset(LSIState *s)
     s->dnad = 0;
     s->dbc = 0;
     s->temp = 0;
-    memset(s->scratch, 0, sizeof(s->scratch));
+    /* The Linux driver (sym53c8xx) when in 64-bit mode relies on scratch regs
+     * C-R to not be touched. The Tech manual doesn't dictate that scratch
+     * registers be cleared. */
+    s->scratch[0] = 0; /* reset scratchA */
+    s->scratch[1] = 0; /* reset scratchB */
     s->istat0 = 0;
     s->istat1 = 0;
     s->dcmd = 0;