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[Qemu-devel] [5606] tcg-op.h: reorder _i64 instructions common to 32- an
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [5606] tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets |
Date: |
Mon, 03 Nov 2008 07:08:27 +0000 |
Revision: 5606
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5606
Author: aurel32
Date: 2008-11-03 07:08:26 +0000 (Mon, 03 Nov 2008)
Log Message:
-----------
tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets
Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.
Signed-off-by: Aurelien Jarno <address@hidden>
Modified Paths:
--------------
trunk/tcg/tcg-op.h
Modified: trunk/tcg/tcg-op.h
===================================================================
--- trunk/tcg/tcg-op.h 2008-11-03 01:08:14 UTC (rev 5605)
+++ trunk/tcg/tcg-op.h 2008-11-03 07:08:26 UTC (rev 5606)
@@ -1055,21 +1055,6 @@
}
}
-static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
- int label_index)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_brcond_i64(cond, arg1, t0, label_index);
- tcg_temp_free(t0);
-}
-
-static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_mul_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_subfi_i64(TCGv ret, int64_t arg1, TCGv arg2)
{
TCGv t0 = tcg_const_i64(arg1);
@@ -1088,7 +1073,22 @@
tcg_temp_free(t0);
}
}
+static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_brcond_i64(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_mul_i64(ret, arg1, t0);
+ tcg_temp_free(t0);
+}
+
+
/***************************************/
/* optional operations */
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