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[Qemu-devel] [5017] Correct 32bit carry flag for add instruction (Igor K
From: |
Blue Swirl |
Subject: |
[Qemu-devel] [5017] Correct 32bit carry flag for add instruction (Igor Kovalenko) |
Date: |
Sun, 17 Aug 2008 08:33:48 +0000 |
Revision: 5017
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5017
Author: blueswir1
Date: 2008-08-17 08:33:47 +0000 (Sun, 17 Aug 2008)
Log Message:
-----------
Correct 32bit carry flag for add instruction (Igor Kovalenko)
Modified Paths:
--------------
trunk/target-sparc/translate.c
Modified: trunk/target-sparc/translate.c
===================================================================
--- trunk/target-sparc/translate.c 2008-08-17 01:44:53 UTC (rev 5016)
+++ trunk/target-sparc/translate.c 2008-08-17 08:33:47 UTC (rev 5017)
@@ -349,16 +349,19 @@
*/
static inline void gen_cc_C_add_icc(TCGv dst, TCGv src1)
{
- TCGv r_temp;
+ TCGv r_temp1, r_temp2;
int l1;
l1 = gen_new_label();
- r_temp = tcg_temp_new(TCG_TYPE_TL);
- tcg_gen_andi_tl(r_temp, dst, 0xffffffffULL);
- tcg_gen_brcond_tl(TCG_COND_GEU, dst, src1, l1);
+ r_temp1 = tcg_temp_new(TCG_TYPE_TL);
+ r_temp2 = tcg_temp_new(TCG_TYPE_TL);
+ tcg_gen_andi_tl(r_temp1, dst, 0xffffffffULL);
+ tcg_gen_andi_tl(r_temp2, src1, 0xffffffffULL);
+ tcg_gen_brcond_tl(TCG_COND_GEU, r_temp1, r_temp2, l1);
tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_CARRY);
gen_set_label(l1);
- tcg_temp_free(r_temp);
+ tcg_temp_free(r_temp1);
+ tcg_temp_free(r_temp2);
}
#ifdef TARGET_SPARC64
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