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[Qemu-devel] [4929] Use plain standard inline.
From: |
Thiemo Seufer |
Subject: |
[Qemu-devel] [4929] Use plain standard inline. |
Date: |
Wed, 23 Jul 2008 16:16:31 +0000 |
Revision: 4929
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4929
Author: ths
Date: 2008-07-23 16:16:31 +0000 (Wed, 23 Jul 2008)
Log Message:
-----------
Use plain standard inline.
Modified Paths:
--------------
trunk/target-mips/exec.h
trunk/target-mips/op_helper.c
Modified: trunk/target-mips/exec.h
===================================================================
--- trunk/target-mips/exec.h 2008-07-23 16:14:22 UTC (rev 4928)
+++ trunk/target-mips/exec.h 2008-07-23 16:16:31 UTC (rev 4929)
@@ -47,15 +47,15 @@
void cpu_mips_clock_init (CPUState *env);
void cpu_mips_tlb_flush (CPUState *env, int flush_global);
-static always_inline void env_to_regs(void)
+static inline void env_to_regs(void)
{
}
-static always_inline void regs_to_env(void)
+static inline void regs_to_env(void)
{
}
-static always_inline int cpu_halted(CPUState *env)
+static inline int cpu_halted(CPUState *env)
{
if (!env->halted)
return 0;
@@ -67,7 +67,7 @@
return EXCP_HALTED;
}
-static always_inline void compute_hflags(CPUState *env)
+static inline void compute_hflags(CPUState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |
MIPS_HFLAG_F64 | MIPS_HFLAG_FPU | MIPS_HFLAG_KSU);
Modified: trunk/target-mips/op_helper.c
===================================================================
--- trunk/target-mips/op_helper.c 2008-07-23 16:14:22 UTC (rev 4928)
+++ trunk/target-mips/op_helper.c 2008-07-23 16:16:31 UTC (rev 4929)
@@ -87,24 +87,24 @@
#endif /* TARGET_MIPS64 */
/* 64 bits arithmetic for 32 bits hosts */
-static always_inline uint64_t get_HILO (void)
+static inline uint64_t get_HILO (void)
{
return ((uint64_t)(env->active_tc.HI[0]) << 32) |
(uint32_t)env->active_tc.LO[0];
}
-static always_inline void set_HILO (uint64_t HILO)
+static inline void set_HILO (uint64_t HILO)
{
env->active_tc.LO[0] = (int32_t)HILO;
env->active_tc.HI[0] = (int32_t)(HILO >> 32);
}
-static always_inline void set_HIT0_LO (target_ulong t0, uint64_t HILO)
+static inline void set_HIT0_LO (target_ulong t0, uint64_t HILO)
{
env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
t0 = env->active_tc.HI[0] = (int32_t)(HILO >> 32);
}
-static always_inline void set_HI_LOT0 (target_ulong t0, uint64_t HILO)
+static inline void set_HI_LOT0 (target_ulong t0, uint64_t HILO)
{
t0 = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
env->active_tc.HI[0] = (int32_t)(HILO >> 32);
@@ -1996,7 +1996,7 @@
do_raise_exception(EXCP_FPE);
}
-static always_inline char ieee_ex_to_mips(char xcpt)
+static inline char ieee_ex_to_mips(char xcpt)
{
return (xcpt & float_flag_inexact) >> 5 |
(xcpt & float_flag_underflow) >> 3 |
@@ -2005,7 +2005,7 @@
(xcpt & float_flag_invalid) << 4;
}
-static always_inline char mips_ex_to_ieee(char xcpt)
+static inline char mips_ex_to_ieee(char xcpt)
{
return (xcpt & FP_INEXACT) << 5 |
(xcpt & FP_UNDERFLOW) << 3 |
@@ -2014,7 +2014,7 @@
(xcpt & FP_INVALID) >> 4;
}
-static always_inline void update_fcr31(void)
+static inline void update_fcr31(void)
{
int tmp = ieee_ex_to_mips(get_float_exception_flags(&env->fpu->fp_status));
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