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[Qemu-devel] [4408] suppressed fixed registers
From: |
Fabrice Bellard |
Subject: |
[Qemu-devel] [4408] suppressed fixed registers |
Date: |
Sat, 10 May 2008 10:58:20 +0000 |
Revision: 4408
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4408
Author: bellard
Date: 2008-05-10 10:58:20 +0000 (Sat, 10 May 2008)
Log Message:
-----------
suppressed fixed registers
Modified Paths:
--------------
trunk/target-sparc/cpu.h
trunk/target-sparc/exec.h
trunk/target-sparc/op_helper.c
trunk/target-sparc/translate.c
Modified: trunk/target-sparc/cpu.h
===================================================================
--- trunk/target-sparc/cpu.h 2008-05-10 10:55:51 UTC (rev 4407)
+++ trunk/target-sparc/cpu.h 2008-05-10 10:58:20 UTC (rev 4408)
@@ -188,7 +188,6 @@
typedef struct CPUSPARCState {
target_ulong gregs[8]; /* general registers */
target_ulong *regwptr; /* pointer to current register window */
- float32 fpr[TARGET_FPREGS]; /* floating point registers */
target_ulong pc; /* program counter */
target_ulong npc; /* next program counter */
target_ulong y; /* multiply/divide register */
@@ -197,8 +196,13 @@
target_ulong cc_src, cc_src2;
target_ulong cc_dst;
+ target_ulong t0, t1; /* temporaries live across basic blocks */
+ target_ulong cond; /* conditional branch result (XXX: save it in a
+ temporary register when possible) */
+
uint32_t psr; /* processor state register */
target_ulong fsr; /* FPU state register */
+ float32 fpr[TARGET_FPREGS]; /* floating point registers */
uint32_t cwp; /* index of current register window (extracted
from PSR) */
uint32_t wim; /* window invalid mask */
@@ -271,7 +275,6 @@
uint64_t hpstate, htstate[MAXTL], hintp, htba, hver, hstick_cmpr, ssr;
void *hstick; // UA 2005
#endif
- target_ulong t1, t2;
uint32_t features;
} CPUSPARCState;
Modified: trunk/target-sparc/exec.h
===================================================================
--- trunk/target-sparc/exec.h 2008-05-10 10:55:51 UTC (rev 4407)
+++ trunk/target-sparc/exec.h 2008-05-10 10:58:20 UTC (rev 4408)
@@ -4,37 +4,8 @@
#include "dyngen-exec.h"
register struct CPUSPARCState *env asm(AREG0);
-
-#ifdef TARGET_SPARC64
-#define T0 (env->t0)
-#define T2 (env->t2)
#define REGWPTR env->regwptr
-#else
-register uint32_t T0 asm(AREG1);
-#undef REG_REGWPTR // Broken
-#ifdef REG_REGWPTR
-#if defined(__sparc__)
-register uint32_t *REGWPTR asm(AREG4);
-#else
-register uint32_t *REGWPTR asm(AREG3);
-#endif
-#define reg_REGWPTR
-
-#ifdef AREG4
-register uint32_t T2 asm(AREG4);
-#define reg_T2
-#else
-#define T2 (env->t2)
-#endif
-
-#else
-#define REGWPTR env->regwptr
-register uint32_t T2 asm(AREG3);
-#endif
-#define reg_T2
-#endif
-
#define FT0 (env->ft0)
#define FT1 (env->ft1)
#define DT0 (env->dt0)
Modified: trunk/target-sparc/op_helper.c
===================================================================
--- trunk/target-sparc/op_helper.c 2008-05-10 10:55:51 UTC (rev 4407)
+++ trunk/target-sparc/op_helper.c 2008-05-10 10:58:20 UTC (rev 4408)
@@ -2189,33 +2189,6 @@
#define ADDR(x) (x)
#endif
-#ifdef __i386__
-void helper_std_i386(target_ulong addr, int mem_idx)
-{
- uint64_t tmp = ((uint64_t)env->t1 << 32) | (uint64_t)(env->t2 &
0xffffffff);
-
-#if !defined(CONFIG_USER_ONLY)
- switch (mem_idx) {
- case 0:
- stq_user(ADDR(addr), tmp);
- break;
- case 1:
- stq_kernel(ADDR(addr), tmp);
- break;
-#ifdef TARGET_SPARC64
- case 2:
- stq_hypv(ADDR(addr), tmp);
- break;
-#endif
- default:
- break;
- }
-#else
- stq_raw(ADDR(addr), tmp);
-#endif
-}
-#endif /* __i386__ */
-
void helper_stdf(target_ulong addr, int mem_idx)
{
#if !defined(CONFIG_USER_ONLY)
@@ -2894,7 +2867,7 @@
if (tb) {
/* the PC is inside the translated code. It means that we have
a virtual CPU fault */
- cpu_restore_state(tb, env, pc, (void *)T2);
+ cpu_restore_state(tb, env, pc, (void *)env->cond);
}
}
cpu_loop_exit();
Modified: trunk/target-sparc/translate.c
===================================================================
--- trunk/target-sparc/translate.c 2008-05-10 10:55:51 UTC (rev 4407)
+++ trunk/target-sparc/translate.c 2008-05-10 10:58:20 UTC (rev 4408)
@@ -46,7 +46,7 @@
according to jump_pc[T2] */
/* global register indexes */
-static TCGv cpu_env, cpu_T[3], cpu_regwptr, cpu_cc_src, cpu_cc_src2,
cpu_cc_dst;
+static TCGv cpu_env, cpu_T[2], cpu_regwptr, cpu_cc_src, cpu_cc_src2,
cpu_cc_dst;
static TCGv cpu_psr, cpu_fsr, cpu_pc, cpu_npc, cpu_gregs[8];
static TCGv cpu_cond, cpu_src1, cpu_src2, cpu_dst, cpu_addr, cpu_val;
#ifdef TARGET_SPARC64
@@ -4223,16 +4223,9 @@
tcg_gen_helper_0_2(helper_check_align, cpu_addr,
tcg_const_i32(7));
r_low = tcg_temp_new(TCG_TYPE_I32);
gen_movl_reg_TN(rd + 1, r_low);
-#ifndef __i386__
tcg_gen_helper_1_2(helper_pack64, cpu_tmp64, cpu_val,
r_low);
tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx);
-#else /* __i386__ */
- tcg_gen_st_tl(cpu_val, cpu_env, offsetof(CPUState,
t1));
- tcg_gen_st_tl(r_low, cpu_env, offsetof(CPUState, t2));
- tcg_gen_helper_0_2(helper_std_i386, cpu_addr,
- tcg_const_i32(dc->mem_idx));
-#endif /* __i386__ */
}
break;
#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
@@ -4475,8 +4468,6 @@
cpu_tmp32 = tcg_temp_new(TCG_TYPE_I32);
cpu_tmp64 = tcg_temp_new(TCG_TYPE_I64);
- cpu_cond = cpu_T[2];
-
do {
if (env->nb_breakpoints > 0) {
for(j = 0; j < env->nb_breakpoints; j++) {
@@ -4599,22 +4590,18 @@
cpu_regwptr = tcg_global_mem_new(TCG_TYPE_PTR, TCG_AREG0,
offsetof(CPUState, regwptr),
"regwptr");
- //#if TARGET_LONG_BITS > HOST_LONG_BITS
#ifdef TARGET_SPARC64
- cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
- TCG_AREG0, offsetof(CPUState, t0), "T0");
- cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL,
- TCG_AREG0, offsetof(CPUState, t1), "T1");
- cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL,
- TCG_AREG0, offsetof(CPUState, t2), "T2");
cpu_xcc = tcg_global_mem_new(TCG_TYPE_I32,
TCG_AREG0, offsetof(CPUState, xcc),
"xcc");
-#else
- cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
- cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
- cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2");
#endif
+ /* XXX: T0 and T1 should be temporaries */
+ cpu_T[0] = tcg_global_mem_new(TCG_TYPE_TL,
+ TCG_AREG0, offsetof(CPUState, t0), "T0");
+ cpu_T[1] = tcg_global_mem_new(TCG_TYPE_TL,
+ TCG_AREG0, offsetof(CPUState, t1), "T1");
+ cpu_cond = tcg_global_mem_new(TCG_TYPE_TL,
+ TCG_AREG0, offsetof(CPUState, cond),
"cond");
cpu_cc_src = tcg_global_mem_new(TCG_TYPE_TL,
TCG_AREG0, offsetof(CPUState, cc_src),
"cc_src");
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