qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH] sparc32 machine specific maximums


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH] sparc32 machine specific maximums
Date: Mon, 3 Dec 2007 19:25:31 +0200

On 12/3/07, Robert Reif <address@hidden> wrote:
> This patch sets the maximum number of CPUs and memory to what is
> supported by the actual hardware.

While it's not historically accurate to emulate a Sparcstation 5 with
16 CPUs and 2 gigabytes of memory, it doesn't break anything to have
this capability. We don't throttle the power of the CPU, speed of the
network, serial or disk devices either, so they may be unrealistically
fast. The timers are not accurate at all compared to CPU execution
speed.

Currently the memory on SS-5 machine is limited by the location of
IOMMU and that the memory lies in one linear bank starting from zero.
With more advanced banking and >4G patches, the entire physical
address space could be filled with RAM.




reply via email to

[Prev in Thread] Current Thread [Next in Thread]