> It's entirely possibly that qemu and real sparc hardware are behaving
> differently, but I'm not seeing this bus error under qemu. (I haven't got
> real sparc hardware, so I can only debug against qemu...)
Right. Debugging the problem I found out that in Qemu, 64-bit loads
and stores to unaligned addresses do not trigger any traps as they
should. I'll commit a fix soon. The problem is in uClibc ldso, there
is this kind of store.
Running the program on qemu-sparc reveals another problem, probably
because of these definitions in ldso/ldso/sparc/dl-sysdep.h:
/* 4096 bytes alignment */
/* ...but 8192 is required for mmap() on sparc64 kernel */
#define PAGE_ALIGN 0xffffe000
#define ADDR_ALIGN 0x1fff
#define OFFS_ALIGN 0x7fffe000
On Sparc32 the correct page alignment is still 4096. Because of these
definitions, some code apparently tries to clear a 8k page, but only
4k of memory is mapped.