Re: [Qemu-devel] SSE 'maxps' instruction bug?

[Tim Olson]

On Mar 12, 2007, at 11:27 AM, malc wrote:

> QEMU and Core 2 Duo disagree on the handling of NaNs it seems.
>
> http://courses.ece.uiuc.edu/ece390/books/labmanual/inst-ref-simd.html
> - this implies that MAXPS should leave the NaNs alone, no idea how
> normative that is though (and no IA32 manual at hand)

I compiled and ran the code that Julian supplied on an AMD processor 
with SSE, and on qemu-i386  version 0.8.2 built with that system, and 
both agreed with the Intel Core 2 results that Julian supplied.

That means that either qemu changed in this area between v 0.8.2 and 
0.9.0, or that the compiler/host combination used to build the qemu 
binary Julian is running generated bad code for the float compares.

The MAXPS instruction is defined to operate on NaNs in such a way that 
it can be used as a direct replacement for an iterated scalar max 
operation coded in C like:

        a = (a > b) ? a : b;

Which is exactly how it is coded in qemu (at least in v0.8.2).  This 
relies upon the fact that the greater-than comparison returns false 
anytime there is an unordered operand (NaN), for either operand -- in 
which case the result is the second argument.

        -- Tim Olson