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Re: [Qemu-devel] [PATCH] Add MIPS ELF loader


From: Alexander Voropay
Subject: Re: [Qemu-devel] [PATCH] Add MIPS ELF loader
Date: Thu, 20 Apr 2006 16:19:38 +0400

  move k0, zero
  j    0xbfc00400
  nop

Is the move implemented as addiu or as daddiu? The latter would RI.

Oh! It was daddu (gcc -mips3) opcode.

Another issue:

mtc0  zero, C0_CAUSE

===============
IN:
0xbfc00424:  mtc0       zero,$13

OP:
0x0000: save_pc 0xbfc00424
0x0001: raise_exception 0x11
0x0002: reset_T0
0x0003: exit_tb
0x0004: end

---------------- 3 00000000
OUT: [size=24]
0x08a96a90:  movl   $0xbfc00424,0x80(%ebp)
0x08a96a9a:  push   $0x11
0x08a96a9f:  call   0x8080fe8
0x08a96aa4:  pop    %eax
0x08a96aa5:  xor    %ebx,%ebx
0x08a96aa7:  ret

do_raise_exception_err: 17 0
do_interrupt enter: PC bfc00424 EPC 00000000 cause -1 excp 17
do_interrupt: PC bfc00380 EPC bfc00424 cause 11 excp 17
   S 00400000 C 0000042c A 00000000 D 00000000
------------------------------------------------
pc=0xbfc00380 HI=0x00000000 LO=0x00000000 ds 0004 00000000 0
GPR00: r0 00000000 at 00400000 v0 00400000 v1 00000000
GPR04: a0 00000000 a1 00000000 a2 00000000 a3 00000000
GPR08: t0 00018000 t1 00000000 t2 00000000 t3 00000000
GPR12: t4 00000000 t5 00000000 t6 00000000 t7 00000000
GPR16: s0 00000000 s1 00000000 s2 00000000 s3 00000000
GPR20: s4 00000000 s5 00000000 s6 00000000 s7 00000000
GPR24: t8 00000000 t9 00000000 k0 00000000 k1 00000000
GPR28: gp 00000000 sp 00000000 s8 00000000 ra 00000000
CP0 Status  0x00400002 Cause   0x0000042c EPC    0xbfc00424
   Config0 0x80008090 Config1 0x1e190c8a LLAddr 0x00000000
IN:
0xbfc00380:  j  0xbfc019c0





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