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Re: [Qemu-devel] [PATCH] Trivial code improvement
From: |
Thiemo Seufer |
Subject: |
Re: [Qemu-devel] [PATCH] Trivial code improvement |
Date: |
Fri, 17 Feb 2006 16:53:06 +0000 |
User-agent: |
Mutt/1.5.11+cvs20060126 |
On Thu, Feb 16, 2006 at 05:27:47PM -0500, Daniel Jacobowitz wrote:
> On Thu, Feb 16, 2006 at 04:32:04PM +0000, Thiemo Seufer wrote:
> > Index: cpu-exec.c
> > ===================================================================
> > RCS file: /sources/qemu/qemu/cpu-exec.c,v
> > retrieving revision 1.73
> > diff -u -p -r1.73 cpu-exec.c
> > --- cpu-exec.c 8 Feb 2006 22:43:39 -0000 1.73
> > +++ cpu-exec.c 16 Feb 2006 15:21:03 -0000
> > @@ -549,7 +549,7 @@ int cpu_exec(CPUState *env1)
> > do_interrupt(env);
> > }
> > #endif
> > - if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
> > + if (interrupt_request & CPU_INTERRUPT_EXITTB) {
> > env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
> > /* ensure that no TB jump will be modified as
> > the program flow was changed */
>
> Didn't we go round this recently? do_interrupt might modify
> env->interrupt_request - see target-arm/helper.c for instance.
Hm, interesting side-effect. Updated patch appended.
Thiemo
Index: cpu-exec.c
===================================================================
RCS file: /sources/qemu/qemu/cpu-exec.c,v
retrieving revision 1.73
diff -u -p -r1.73 cpu-exec.c
--- cpu-exec.c 8 Feb 2006 22:43:39 -0000 1.73
+++ cpu-exec.c 17 Feb 2006 16:45:38 -0000
@@ -549,6 +549,8 @@ int cpu_exec(CPUState *env1)
do_interrupt(env);
}
#endif
+ /* Don't use the cached interupt_request value,
+ do_interrupt may have updated the EXITTB flag. */
if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {
env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
/* ensure that no TB jump will be modified as
Index: target-mips/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-mips/helper.c,v
retrieving revision 1.8
diff -u -p -r1.8 helper.c
--- target-mips/helper.c 5 Dec 2005 19:59:36 -0000 1.8
+++ target-mips/helper.c 17 Feb 2006 16:45:39 -0000
@@ -220,7 +219,6 @@ int cpu_mips_handle_mmu_fault (CPUState
exception = EXCP_TLBS;
else
exception = EXCP_TLBL;
- error_code = 0;
break;
case -4:
/* TLB match but 'D' bit is cleared */
@@ -350,7 +349,6 @@ void do_interrupt (CPUState *env)
cause = 4;
goto set_EPC;
case EXCP_TLBL:
- case EXCP_TLBF:
cause = 2;
if (env->error_code == 1 && !(env->hflags & MIPS_HFLAG_EXL))
offset = 0x000;