start end size prot 08048000-0807f000 00037000 r-x 0807f000-08081000 00002000 rw- 08081000-08085000 00004000 rwx 30027000-300a7000 00080000 rw- 300a7000-300a8000 00001000 --- start_brk 0x0808482c end_code 0x0807e4c8 start_code 0x08048000 end_data 0x08080908 start_stack 0x300a6dbc brk 0x0808482c esp 0x300a6dbc eip 0x080480f0 ---------------- IN: 0x080480f0: xorl %ebp,%ebp 0x080480f2: popl %esi 0x080480f3: movl %esp,%ecx 0x080480f5: andl $0xfffffff8,%esp 0x080480f8: pushl %eax 0x080480f9: pushl %esp 0x080480fa: pushl %edx 0x080480fb: pushl $0x8075edc 0x08048100: pushl $0x80480b4 0x08048105: pushl %ecx 0x08048106: pushl %esi 0x08048107: pushl $0x804fdec 0x0804810c: call 0x0 OP: 0x0000: movl_T0_EBP 0x0001: movl_T1_EBP 0x0002: xorl_T0_T1_cc 0x0003: movl_EBP_T0 0x0004: popl_T0 0x0005: movl_ESI_T0 0x0006: addl_ESP_4 0x0007: movl_T0_ESP 0x0008: movl_ECX_T0 0x0009: movl_T1_im 0xfffffff8 0x000a: movl_T0_ESP 0x000b: andl_T0_T1_cc 0x000c: movl_ESP_T0 0x000d: movl_T0_EAX 0x000e: pushl_T0 0x000f: movl_T0_ESP 0x0010: pushl_T0 0x0011: movl_T0_EDX 0x0012: pushl_T0 0x0013: movl_T0_im 0x8075edc 0x0014: pushl_T0 0x0015: movl_T0_im 0x80480b4 0x0016: pushl_T0 0x0017: movl_T0_ECX 0x0018: pushl_T0 0x0019: movl_T0_ESI 0x001a: pushl_T0 0x001b: movl_T0_im 0x804fdec 0x001c: pushl_T0 0x001d: movl_T0_im 0x8048111 0x001e: pushl_T0 0x001f: set_cc_op 0x11 0x0020: jmp_tb_next 0x60191528 0x804fec0 0x0021: end AFTER FLAGS OPT: 0x0000: movl_T0_EBP 0x0001: movl_T1_EBP 0x0002: xorl_T0_T1 0x0003: movl_EBP_T0 0x0004: popl_T0 0x0005: movl_ESI_T0 0x0006: addl_ESP_4 0x0007: movl_T0_ESP 0x0008: movl_ECX_T0 0x0009: movl_T1_im 0xfffffff8 0x000a: movl_T0_ESP 0x000b: andl_T0_T1_cc 0x000c: movl_ESP_T0 0x000d: movl_T0_EAX 0x000e: pushl_T0 0x000f: movl_T0_ESP 0x0010: pushl_T0 0x0011: movl_T0_EDX 0x0012: pushl_T0 0x0013: movl_T0_im 0x8075edc 0x0014: pushl_T0 0x0015: movl_T0_im 0x80480b4 0x0016: pushl_T0 0x0017: movl_T0_ECX 0x0018: pushl_T0 0x0019: movl_T0_ESI 0x001a: pushl_T0 0x001b: movl_T0_im 0x804fdec 0x001c: pushl_T0 0x001d: movl_T0_im 0x8048111 0x001e: pushl_T0 0x001f: set_cc_op 0x11 0x0020: jmp_tb_next 0x60191528 0x804fec0 0x0021: end OUT: [size=264] 0x60331528: mr r24,r21 0x6033152c: mr r25,r21 0x60331530: xor r24,r24,r25 0x60331534: mr r21,r24 0x60331538: lwbrx r0,r0,r20 0x6033153c: mr r24,r0 0x60331540: mr r22,r24 0x60331544: addi r20,r20,4 0x60331548: mr r24,r20 0x6033154c: mr r17,r24 0x60331550: lis r9,0 0x60331554: addi r25,r9,-8 0x60331558: mr r24,r20 0x6033155c: and r24,r24,r25 0x60331560: stw r24,44(r27) 0x60331564: mr r20,r24 0x60331568: mr r24,r16 0x6033156c: addi r9,r20,-4 0x60331570: stwbrx r24,r0,r9 0x60331574: mr r20,r9 0x60331578: mr r24,r20 0x6033157c: addi r9,r20,-4 0x60331580: stwbrx r24,r0,r9 0x60331584: mr r20,r9 0x60331588: mr r24,r18 0x6033158c: addi r9,r20,-4 0x60331590: stwbrx r24,r0,r9 0x60331594: mr r20,r9 0x60331598: lis r9,2055 0x6033159c: addi r24,r9,24284 0x603315a0: addi r9,r20,-4 0x603315a4: stwbrx r24,r0,r9 0x603315a8: mr r20,r9 0x603315ac: lis r9,2053 0x603315b0: addi r24,r9,-32588 0x603315b4: addi r9,r20,-4 0x603315b8: stwbrx r24,r0,r9 0x603315bc: mr r20,r9 0x603315c0: mr r24,r17 0x603315c4: addi r9,r20,-4 0x603315c8: stwbrx r24,r0,r9 0x603315cc: mr r20,r9 0x603315d0: mr r24,r22 0x603315d4: addi r9,r20,-4 0x603315d8: stwbrx r24,r0,r9 0x603315dc: mr r20,r9 0x603315e0: lis r9,2053 0x603315e4: addi r24,r9,-532 0x603315e8: addi r9,r20,-4 0x603315ec: stwbrx r24,r0,r9 0x603315f0: mr r20,r9 0x603315f4: lis r9,2053 0x603315f8: addi r24,r9,-32495 0x603315fc: addi r9,r20,-4 0x60331600: stwbrx r24,r0,r9 0x60331604: mr r20,r9 0x60331608: lis r9,0 0x6033160c: addi r9,r9,17 0x60331610: stw r9,48(r27) 0x60331614: b 6045B9C8 0x60331618: lis r11,24601 0x6033161c: lis r9,2053 0x60331620: addi r24,r11,5416 0x60331624: addi r9,r9,-320 0x60331628: stw r9,32(r27) 0x6033162c: blr