[Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld

From:	Richard Henderson
Subject:	[Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld*
Date:	Wed, 15 May 2024 02:48:00 -0700
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 80189472303e0209deb1c483915df87c0a8310bf
      
https://github.com/qemu/qemu/commit/80189472303e0209deb1c483915df87c0a8310bf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h
    M target/hexagon/translate.c
    M target/microblaze/translate.c

  Log Message:
  -----------
  accel/tcg: Use vaddr in translator_ld*

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 66f3b79e85149f42465a580c2530638e27c4a4bb
      
https://github.com/qemu/qemu/commit/66f3b79e85149f42465a580c2530638e27c4a4bb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Hide in_same_page outside of a target-specific context

While there are other methods that could be used to replace
TARGET_PAGE_MASK, the function is not really required outside
the context of target-specific translation.

This makes the header usable by target independent code.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 99977aefd07d85da791e0d851ba2d10d9d5c3094
      
https://github.com/qemu/qemu/commit/99977aefd07d85da791e0d851ba2d10d9d5c3094
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  accel/tcg: Pass DisasContextBase to translator_fake_ldb

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 04f8ed114545f01a2fee1121e862e270cdd46741
      
https://github.com/qemu/qemu/commit/04f8ed114545f01a2fee1121e862e270cdd46741
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c

  Log Message:
  -----------
  accel/tcg: Reorg translator_ld*

Reorg translator_access into translator_ld, with a more
memcpy-ish interface.  If both pages are in ram, do not
go through the caller's slow path.

Assert that the access is within the two pages that we are
prepared to protect, per TranslationBlock.  Allow access
prior to pc_first, so long as it is within the first page.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ddfa9f11766c532209d4ce848c12761d28730338
      
https://github.com/qemu/qemu/commit/ddfa9f11766c532209d4ce848c12761d28730338
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c

  Log Message:
  -----------
  accel/tcg: Cap the translation block when we encounter mmio

Do not allow translation to proceed beyond one insn with mmio,
as we will not be caching the TranslationBlock.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ba3fb2a735963cf3988ef9476d134a8418baa436
      
https://github.com/qemu/qemu/commit/ba3fb2a735963cf3988ef9476d134a8418baa436
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Record mmio bytes during translation

This will be able to replace plugin_insn_append, and will
be usable for disassembly.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b3f05b8ce24a2dae2e37bd6e7910f19652848656
      
https://github.com/qemu/qemu/commit/b3f05b8ce24a2dae2e37bd6e7910f19652848656
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Record when translator_fake_ldb is used

Remove left-over comment from commit dcd092a063
("accel/tcg: Improve can_do_io management").

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: bf4bb074b72a7dc6c9ee5379a1d6b693dcd0a5a6
      
https://github.com/qemu/qemu/commit/bf4bb074b72a7dc6c9ee5379a1d6b693dcd0a5a6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M include/tcg/tcg.h

  Log Message:
  -----------
  accel/tcg: Record DisasContextBase in tcg_ctx for plugins

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4abc892362f8282450f18c4e45c5b0534461d01e
      
https://github.com/qemu/qemu/commit/4abc892362f8282450f18c4e45c5b0534461d01e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M contrib/plugins/execlog.c
    M contrib/plugins/howvec.c
    M include/qemu/qemu-plugin.h
    M plugins/api.c

  Log Message:
  -----------
  plugins: Copy memory in qemu_plugin_insn_data

Instead of returning a host pointer, copy the data into
storage provided by the caller.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3a247368e6fc12304e73451c63254313e2ebd60e
      
https://github.com/qemu/qemu/commit/3a247368e6fc12304e73451c63254313e2ebd60e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h

  Log Message:
  -----------
  accel/tcg: Implement translator_st

Copy data out of a completed translation.  This will be used
for both plugins and disassembly.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 36bc99bc789fd564facea93feb2a22e4942b84d0
      
https://github.com/qemu/qemu/commit/36bc99bc789fd564facea93feb2a22e4942b84d0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M accel/tcg/translator.c
    M include/qemu/plugin.h
    M plugins/api.c
    M tcg/tcg.c

  Log Message:
  -----------
  plugins: Use translator_st for qemu_plugin_insn_data

Use the bytes that we record for the entire TB, rather than
a per-insn GByteArray.  Record the length of the insn in
plugin_gen_insn_end rather than infering from the length
of the array.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e501325991815e09297a048ffb0be81411bbe34a
      
https://github.com/qemu/qemu/commit/e501325991815e09297a048ffb0be81411bbe34a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M accel/tcg/translator.c
    M include/exec/plugin-gen.h
    M include/qemu/plugin.h
    M plugins/api.c

  Log Message:
  -----------
  plugins: Read mem_only directly from TB cflags

Do not pass around a boolean between multiple structures,
just read it from the TranslationBlock in the TCGContext.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d3ace105900c43d1eb034b81ce0951e6110ab990
      
https://github.com/qemu/qemu/commit/d3ace105900c43d1eb034b81ce0951e6110ab990
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M include/qemu/plugin.h
    M plugins/api.c

  Log Message:
  -----------
  plugins: Use DisasContextBase for qemu_plugin_insn_haddr

We can delay the computation of haddr until the plugin
actually requests it.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e763953a2445770bb5d1653d0c258dca5a6de5e2
      
https://github.com/qemu/qemu/commit/e763953a2445770bb5d1653d0c258dca5a6de5e2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M include/qemu/plugin.h
    M plugins/api.c

  Log Message:
  -----------
  plugins: Use DisasContextBase for qemu_plugin_tb_vaddr

We do not need to separately record the start of the TB.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 34e5e1dde5b9760936a6e2426f5ff0d55a0695b0
      
https://github.com/qemu/qemu/commit/34e5e1dde5b9760936a6e2426f5ff0d55a0695b0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M tcg/tcg.c

  Log Message:
  -----------
  plugins: Merge  alloc_tcg_plugin_context into plugin_gen_tb_start

We don't need to allocate plugin context at startup,
we can wait until we actually use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 962a145cdcd118f19597c08939ca24fd6227bc36
      
https://github.com/qemu/qemu/commit/962a145cdcd118f19597c08939ca24fd6227bc36
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M target/alpha/translate.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/translate.c
    M target/loongarch/tcg/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c

  Log Message:
  -----------
  accel/tcg: Provide default implementation of disas_log

Almost all of the disas_log implementations are identical.
Unify them within translator_loop.

Drop extra Priv/Virt logging from target/riscv.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b67c567b79f7f659814d102579d2b503b6d40ed4
      
https://github.com/qemu/qemu/commit/b67c567b79f7f659814d102579d2b503b6d40ed4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h
    M target/hppa/translate.c
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  accel/tcg: Return bool from TranslatorOps.disas_log

We have eliminated most uses of this hook.  Reduce
further by allowing the hook to handle only the
special cases, returning false for normal processing.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c0d691ab844db8cdf2be8f6cf43887cfff56e386
      
https://github.com/qemu/qemu/commit/c0d691ab844db8cdf2be8f6cf43887cfff56e386
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    A disas/disas-common.c
    A disas/disas-host.c
    M disas/disas-internal.h
    A disas/disas-target.c
    R disas/disas.c
    M disas/meson.build
    A disas/objdump.c
    M include/disas/disas.h

  Log Message:
  -----------
  disas: Split disas.c

The routines in disas-common.c are also used from disas-mon.c.
Otherwise the rest of disassembly is only used from tcg.
While we're at it, put host and target code into separate files.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4c833c60e0479d4eec5384fa9ede11ebab78a304
      
https://github.com/qemu/qemu/commit/4c833c60e0479d4eec5384fa9ede11ebab78a304
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M disas/disas-common.c
    M disas/disas-mon.c
    M disas/disas-target.c
    M include/disas/disas.h
    M include/exec/translator.h
    M include/qemu/typedefs.h
    M plugins/api.c

  Log Message:
  -----------
  disas: Use translator_st to get disassembly data

Read from already translated pages, or saved mmio data.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4c6163eaf2ca64391f885ca9625947371a4a4834
      
https://github.com/qemu/qemu/commit/4c6163eaf2ca64391f885ca9625947371a4a4834
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/translator.c
    M include/exec/translator.h
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  accel/tcg: Introduce translator_fake_ld

Replace translator_fake_ldb, which required multiple calls,
with translator_fake_ld, which can take all data at once.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 171ce939812d5e09ff3b9e24e1cc995368258768
      
https://github.com/qemu/qemu/commit/171ce939812d5e09ff3b9e24e1cc995368258768
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  target/s390x: Fix translator_fake_ld length

The ilen value extracted from ex_value is the length of the
EXECUTE instruction itself, and so is the increment to the pc.
However, the length of the synthetic insn is located in the
opcode like all other instructions.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 74e98b9b6f2c914ea61938378956a177b5985773
      
https://github.com/qemu/qemu/commit/74e98b9b6f2c914ea61938378956a177b5985773
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  target/s390x: Disassemble EXECUTEd instructions

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e8939e801cd8f57fd46ece03fc3c4a38378d13fe
      
https://github.com/qemu/qemu/commit/e8939e801cd8f57fd46ece03fc3c4a38378d13fe
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hexagon/translate.c

  Log Message:
  -----------
  target/hexagon: Use translator_ldl in pkt_crosses_page

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1561fee691a012de041cd087c594392f7c02c4c8
      
https://github.com/qemu/qemu/commit/1561fee691a012de041cd087c594392f7c02c4c8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/microblaze/translate.c

  Log Message:
  -----------
  target/microblaze: Use translator_ldl

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dfc7228be3829c28584c54f703cdda18ae56d805
      
https://github.com/qemu/qemu/commit/dfc7228be3829c28584c54f703cdda18ae56d805
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: Use translator_ldub for everything

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6c1992072512d1a005b24201a2f7673dd80216ea
      
https://github.com/qemu/qemu/commit/6c1992072512d1a005b24201a2f7673dd80216ea
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/avr/translate.c

  Log Message:
  -----------
  target/avr: Use translator_lduw

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 32e07f7deceb640ad200f58e6a93b598549fa4bc
      
https://github.com/qemu/qemu/commit/32e07f7deceb640ad200f58e6a93b598549fa4bc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/cris/translate.c

  Log Message:
  -----------
  target/cris: Use translator_ld* in cris_fetch

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1b1138cabeb6fd55438721c6d5fe373ba4fd3cd4
      
https://github.com/qemu/qemu/commit/1b1138cabeb6fd55438721c6d5fe373ba4fd3cd4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/cris/translate.c
    M target/cris/translate_v10.c.inc

  Log Message:
  -----------
  target/cris: Use cris_fetch in translate_v10.c.inc

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1f9c4462334f424d844b52c3476fb3b0ec62ab46
      
https://github.com/qemu/qemu/commit/1f9c4462334f424d844b52c3476fb3b0ec62ab46
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/riscv/translate.c

  Log Message:
  -----------
  target/riscv: Use translator_ld* for everything

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 104cf5524e6694a439891ba4dc071a1427f0ace3
      
https://github.com/qemu/qemu/commit/104cf5524e6694a439891ba4dc071a1427f0ace3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/rx/translate.c

  Log Message:
  -----------
  target/rx: Use translator_ld*

Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a41cd1e6c3475932f9a3ca51a3fc2cc7a697b44e
      
https://github.com/qemu/qemu/commit/a41cd1e6c3475932f9a3ca51a3fc2cc7a697b44e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: Use translator_ldub in xtensa_insn_len

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 763f2413e0e37688d9cf707542cb112142fe23f8
      
https://github.com/qemu/qemu/commit/763f2413e0e37688d9cf707542cb112142fe23f8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/s390x/tcg/translate.c

  Log Message:
  -----------
  target/s390x: Use translator_lduw in get_next_pc

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7c211c1cb47c33f855d3206b46943e6f4d1a3b23
      
https://github.com/qemu/qemu/commit/7c211c1cb47c33f855d3206b46943e6f4d1a3b23
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M include/exec/cpu_ldst.h

  Log Message:
  -----------
  accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code

Previous commits replaced them by translator_ld* calls.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240405131532.40913-1-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c9290dfebfdba5c13baa5e1f10e13a1c876b0643
      
https://github.com/qemu/qemu/commit/c9290dfebfdba5c13baa5e1f10e13a1c876b0643
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M tcg/loongarch64/tcg-target.c.inc

  Log Message:
  -----------
  tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs

TCG register spill/fill uses tcg_out_ld/st with all types,
not necessarily going through INDEX_op_{ld,st}_vec.

Cc: qemu-stable@nongnu.org
Fixes: 16288ded944 ("tcg/loongarch64: Lower basic tcg vec ops to LSX")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2336
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>


  Commit: b61603bfcb21a2dc4cec87a4ebd65916d1670058
      
https://github.com/qemu/qemu/commit/b61603bfcb21a2dc4cec87a4ebd65916d1670058
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.c
    M target/hppa/cpu.h

  Log Message:
  -----------
  target/hppa: Move cpu_get_tb_cpu_state out of line

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 19da5d125842e56f115873a4af06d59559db9bb6
      
https://github.com/qemu/qemu/commit/19da5d125842e56f115873a4af06d59559db9bb6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.c

  Log Message:
  -----------
  target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc

This function is for log_pc(), which needs to produce a
similar result to cpu_get_tb_cpu_state().

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4e31e68bb6e77a48e57aa3a27549313ea0f19f69
      
https://github.com/qemu/qemu/commit/4e31e68bb6e77a48e57aa3a27549313ea0f19f69
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Move constant destination check into use_goto_tb

Share this check between gen_goto_tb and hppa_tr_translate_insn.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 2644f80ba5e0628af058072ed44b14e8d0bee115
      
https://github.com/qemu/qemu/commit/2644f80ba5e0628af058072ed44b14e8d0bee115
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Pass displacement to do_dbranch

Pass a displacement instead of an absolute value.

In trans_be, remove the user-only do_dbranch case.  The branch we are
attempting to optimize is to the zero page, which is perforce on a
different page than the code currently executing, which means that
we will *not* use a goto_tb.  Use a plain indirect branch instead,
which is what we got out of the attempted direct branch anyway.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d582c1faa3dcf6a87736383536b38335796fa214
      
https://github.com/qemu/qemu/commit/d582c1faa3dcf6a87736383536b38335796fa214
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Allow prior nullification in do_ibranch

Simplify the function by not attempting a conditional move
on the branch destination -- just use nullify_over normally.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f9b11bc2e75de806f189f7a5d1e63ba735ef4207
      
https://github.com/qemu/qemu/commit/f9b11bc2e75de806f189f7a5d1e63ba735ef4207
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test

The generic tcg driver will have already checked for breakpoints.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 85e6cda0082c6e8107b9141bfcfb041f7f2a738e
      
https://github.com/qemu/qemu/commit/85e6cda0082c6e8107b9141bfcfb041f7f2a738e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Add install_iaq_entries

Instead of two separate cpu_iaoq_entry calls, use one call to update
both IAQ_Front and IAQ_Back.  Simplify with an argument combination
that automatically handles a simple increment from Front to Back.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 43541db0c40dad6291ce1dcb76b7729f55704893
      
https://github.com/qemu/qemu/commit/43541db0c40dad6291ce1dcb76b7729f55704893
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Add install_link

Add a common routine for writing the return address.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0dcd6640e49c3cbd534e5a1d39338bcd6e691e18
      
https://github.com/qemu/qemu/commit/0dcd6640e49c3cbd534e5a1d39338bcd6e691e18
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Delay computation of IAQ_Next

We no longer have to allocate a temp and perform an
addition before translation of the rest of the insn.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d08ad0e0f08d3b6561be83beb992b9835aa47895
      
https://github.com/qemu/qemu/commit/d08ad0e0f08d3b6561be83beb992b9835aa47895
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Skip nullified insns in unconditional dbranch path

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: dbdccbdf8167881be9974fc582b86ffc6f69ffa1
      
https://github.com/qemu/qemu/commit/dbdccbdf8167881be9974fc582b86ffc6f69ffa1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Simplify TB end

Minimize the amount of code in hppa_tr_translate_insn advancing the
insn queue for the next insn.  Move the goto_tb path to hppa_tr_tb_stop.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 142faf5fab337b809b84890579157c9064668011
      
https://github.com/qemu/qemu/commit/142faf5fab337b809b84890579157c9064668011
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Add IASQ entries to DisasContext

Add variable to track space changes to IAQ.  So far, no such changes
are introduced, but the new checks vs ctx->iasq_b may eliminate an
unnecessary copy to cpu_iasq_f with e.g. BLR.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 588deeda6e7cc2c401ca3cbf22383f019a69ec14
      
https://github.com/qemu/qemu/commit/588deeda6e7cc2c401ca3cbf22383f019a69ec14
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Add space arguments to install_iaq_entries

Move space assighments to a central location.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 019f41591d95ffd7f1d49ace4626aec2cbec19d8
      
https://github.com/qemu/qemu/commit/019f41591d95ffd7f1d49ace4626aec2cbec19d8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Add space argument to do_ibranch

This allows unification of BE, BLR, BV, BVE with a common helper.
Since we can now track space with IAQ_Next, we can now let the
TranslationBlock continue across the delay slot with BE, BVE.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0bb0202962a5f77d1e4cac4533628bb7a566de54
      
https://github.com/qemu/qemu/commit/0bb0202962a5f77d1e4cac4533628bb7a566de54
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use umax in do_ibranch_priv

Using umax is clearer than the same operation using movcond.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 1874e6c2fdb351120c234e6840729c9553d77d05
      
https://github.com/qemu/qemu/commit/1874e6c2fdb351120c234e6840729c9553d77d05
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Always make a copy in do_ibranch_priv

This simplifies callers, which might otherwise have
to make another copy.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: bc921866cefb3ec4031714aeb4569e0e7622dfba
      
https://github.com/qemu/qemu/commit/bc921866cefb3ec4031714aeb4569e0e7622dfba
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Introduce and use DisasIAQE for branch management

Wrap offset and space together in one structure, ensuring
that they're copied together as required.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0d89cb7c29d9030d96c32ea4cdde7b4ee6f3dcf4
      
https://github.com/qemu/qemu/commit/0d89cb7c29d9030d96c32ea4cdde7b4ee6f3dcf4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use displacements in DisasIAQE

This is a first step in enabling CF_PCREL, but for now
we regenerate the absolute address before writeback.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4c42fd0d4e543aaf8981c737f971d27e7c9d4df0
      
https://github.com/qemu/qemu/commit/4c42fd0d4e543aaf8981c737f971d27e7c9d4df0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Rename cond_make_* helpers

Use 'v' for a variable that needs copying, 't' for a temp that
doesn't need copying, and 'i' for an immediate, and use this
naming for both arguments of the comparison.  So:

   cond_make_tmp -> cond_make_tt
   cond_make_0_tmp -> cond_make_ti
   cond_make_0 -> cond_make_vi
   cond_make -> cond_make_vv

Pass 0 explictly, rather than implicitly in the function name.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d6d46be1bf3876db6168d155ed273866d5f595cd
      
https://github.com/qemu/qemu/commit/d6d46be1bf3876db6168d155ed273866d5f595cd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in do_cond

We can directly test bits of a 32-bit comparison without
zero or sign-extending an intermediate result.
We can directly test bit 0 for odd/even.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fbe65c648d46efd5b77f30e9d60a14f09535ea1a
      
https://github.com/qemu/qemu/commit/fbe65c648d46efd5b77f30e9d60a14f09535ea1a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in do_log_cond

We can directly test bits of a 32-bit comparison without
zero or sign-extending an intermediate result.
We can directly test bit 0 for odd/even.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 25f97be7236cc96bccce35f27999b0289c2b221f
      
https://github.com/qemu/qemu/commit/25f97be7236cc96bccce35f27999b0289c2b221f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in do_unit_zero_cond

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3289ea0e8f4894a67f827540d674e3e199596f33
      
https://github.com/qemu/qemu/commit/3289ea0e8f4894a67f827540d674e3e199596f33
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in do_unit_addsub

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b041ec9d7173ec893c1a5bc0bfd25fe860b4fcb0
      
https://github.com/qemu/qemu/commit/b041ec9d7173ec893c1a5bc0bfd25fe860b4fcb0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in trans_bb_imm

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f33a22c1a28f0ba7b9c2fef1953aa6f593da870d
      
https://github.com/qemu/qemu/commit/f33a22c1a28f0ba7b9c2fef1953aa6f593da870d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.h
    M target/hppa/fpu_helper.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use registerfields.h for FPSR

Define all of the context dependent field definitions.
Use FIELD_EX32 and FIELD_DP32 with named fields instead
of extract32 and deposit32 with raw constants.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3692ad21f558f1e3425a5d6cecc241d2601db022
      
https://github.com/qemu/qemu/commit/3692ad21f558f1e3425a5d6cecc241d2601db022
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use TCG_COND_TST* in trans_ftest

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e0137378ed4f3eecc44b7ac9b435f9d91ca7e8fb
      
https://github.com/qemu/qemu/commit/e0137378ed4f3eecc44b7ac9b435f9d91ca7e8fb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Remove cond_free

Now that we do not need to free tcg temporaries, the only
thing cond_free does is reset the condition to never.
Instead, simply write a new condition over the old, which
may be simply cond_make_f() for the never condition.

The do_*_cond functions do the right thing with c or cf == 0,
so there's no need for a special case anymore.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 806030074b25a980f879e43df4e9c06fc45f308c
      
https://github.com/qemu/qemu/commit/806030074b25a980f879e43df4e9c06fc45f308c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Introduce DisasDelayException

Allow an exception to be emitted at the end of the TranslationBlock,
leaving only the conditional branch inline.  Use it for simple
exception instructions like break, which happen to be nullified.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 269ca0a9ccaafd023b7c1fc914c1386128796fb0
      
https://github.com/qemu/qemu/commit/269ca0a9ccaafd023b7c1fc914c1386128796fb0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/helper.h
    M target/hppa/int_helper.c
    M target/hppa/op_helper.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use delay_excp for conditional traps

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a0ea4becca28c1c14de5c3b8bff8343ab184070c
      
https://github.com/qemu/qemu/commit/a0ea4becca28c1c14de5c3b8bff8343ab184070c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/helper.h
    M target/hppa/int_helper.c
    M target/hppa/op_helper.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Use delay_excp for conditional trap on overflow

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3c13b0ffe76057e93e007bedbad3cc556146e3ed
      
https://github.com/qemu/qemu/commit/3c13b0ffe76057e93e007bedbad3cc556146e3ed
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M linux-user/elfload.c
    M linux-user/hppa/cpu_loop.c
    M linux-user/hppa/signal.c
    M linux-user/hppa/target_cpu.h
    M target/hppa/cpu.c
    M target/hppa/cpu.h
    M target/hppa/gdbstub.c
    M target/hppa/translate.c

  Log Message:
  -----------
  linux-user/hppa: Force all code addresses to PRIV_USER

The kernel does this along the return path to user mode.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9dfcd2434989bb09b1ca11258180d9095c1d7ba8
      
https://github.com/qemu/qemu/commit/9dfcd2434989bb09b1ca11258180d9095c1d7ba8
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.c
    M target/hppa/cpu.h
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Store full iaoq_f and page offset of iaoq_b in TB

In preparation for CF_PCREL. store the iaoq_f in 3 parts: high
bits in cs_base, middle bits in pc, and low bits in priv.
For iaoq_b, set a bit for either of space or page differing,
else the page offset.

Install iaq entries before goto_tb. The change to not record
the full direct branch difference in TB means that we have to
store at least iaoq_b before goto_tb.  But since a later change
to enable CF_PCREL will require both iaoq_f and iaoq_b to be
updated before goto_tb, go ahead and update both fields now.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 081a0ed188d8d9d9038f00337d331d185a7ae331
      
https://github.com/qemu/qemu/commit/081a0ed188d8d9d9038f00337d331d185a7ae331
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Do not mask in copy_iaoq_entry

As with loads and stores, code offsets are kept intact until the
full gva is formed.  In qemu, this is in cpu_get_tb_cpu_state.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d2e22fde144ea5f32980031537a7e1bb88e8bcf1
      
https://github.com/qemu/qemu/commit/d2e22fde144ea5f32980031537a7e1bb88e8bcf1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/helper.c

  Log Message:
  -----------
  target/hppa: Improve hppa_cpu_dump_state

Print both raw IAQ_Front and IAQ_Back as well as the GVAs.
Print control registers in system mode.
Print floating point registers if CPU_DUMP_FPU.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ebc9401a4067fd61afea811d1d059d8ac0fc5db9
      
https://github.com/qemu/qemu/commit/ebc9401a4067fd61afea811d1d059d8ac0fc5db9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.h
    M target/hppa/helper.c

  Log Message:
  -----------
  target/hppa: Split PSW X and B into their own field

Generally, both of these bits are cleared at the end of each
instruction.  By separating these, we will be able to clear
both with a single insn, instead of 2 or 3.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d27fe7c3af30a9b6281e7aafb5d603efe64ff939
      
https://github.com/qemu/qemu/commit/d27fe7c3af30a9b6281e7aafb5d603efe64ff939
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Manage PSW_X and PSW_B in translator

PSW_X is cleared after every instruction, and only set by RFI.
PSW_B is cleared after every non-branch, or branch not taken,
and only set by taken branches.  We can clear both bits with a
single store, at most once per TB.  Taken branches set PSW_B,
at most once per TB.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5ae8adbb01cdb0bd2f3c1c444b3e543b38737102
      
https://github.com/qemu/qemu/commit/5ae8adbb01cdb0bd2f3c1c444b3e543b38737102
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Implement PSW_B

PSW_B causes B,GATE to trap as an illegal instruction, removing our
previous sequential execution test that was merely an approximation.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d8bc1381250b39079d5ed33d2be7eee801ca41c9
      
https://github.com/qemu/qemu/commit/d8bc1381250b39079d5ed33d2be7eee801ca41c9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/mem_helper.c

  Log Message:
  -----------
  target/hppa: Implement PSW_X

Use PAGE_WRITE_INV to temporarily enable write permission
on for a given page, driven by PSW_X being set.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 190d7fa5721dced9704717d64b247552a9152482
      
https://github.com/qemu/qemu/commit/190d7fa5721dced9704717d64b247552a9152482
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.h
    M target/hppa/int_helper.c
    M target/hppa/mem_helper.c
    M target/hppa/op_helper.c

  Log Message:
  -----------
  target/hppa: Drop tlb_entry return from hppa_get_physical_address

The return-by-reference is never used.

Reviewed-by: Helge Deller <deller@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 804cd52d3a314799adfa7d931e00c85856c54206
      
https://github.com/qemu/qemu/commit/804cd52d3a314799adfa7d931e00c85856c54206
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.h
    M target/hppa/helper.h
    M target/hppa/mem_helper.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Adjust priv for B,GATE at runtime

Do not compile in the priv change based on the first translation;
look up the PTE at execution time.  This is required for CF_PCREL,
where a page may be mapped multiple times with different attributes.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6dd9b145f65ea425b220426f276b9074bbd429fa
      
https://github.com/qemu/qemu/commit/6dd9b145f65ea425b220426f276b9074bbd429fa
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/cpu.c
    M target/hppa/translate.c

  Log Message:
  -----------
  target/hppa: Implement CF_PCREL

Now that the groundwork has been laid, enabling CF_PCREL within the
translator proper is a simple matter of updating copy_iaoq_entry
and install_iaq_entries.

We also need to modify the unwind info, since we no longer have
absolute addresses to install.

As expected, this reduces the runtime overhead of compilation when
running a Linux kernel with address space randomization enabled.

Reviewed-by: Helge Deller <deller@gmx.de>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 12959fcdcf87dd97aabf844f57329d46e9c54da3
      
https://github.com/qemu/qemu/commit/12959fcdcf87dd97aabf844f57329d46e9c54da3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/int_helper.c

  Log Message:
  -----------
  target/hppa: Log cpu state at interrupt

This contains all of the information logged before, plus more.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 9e035f00788c52a6f51529c54371a611d9f8b089
      
https://github.com/qemu/qemu/commit/9e035f00788c52a6f51529c54371a611d9f8b089
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M target/hppa/sys_helper.c

  Log Message:
  -----------
  target/hppa: Log cpu state on return-from-interrupt

Inverse of the logging on taking an interrupt.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 2b01688380103acc2a9cd197b964d643fceba2a9
      
https://github.com/qemu/qemu/commit/2b01688380103acc2a9cd197b964d643fceba2a9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M accel/tcg/translator.c
    M contrib/plugins/execlog.c
    M contrib/plugins/howvec.c
    A disas/disas-common.c
    A disas/disas-host.c
    M disas/disas-internal.h
    M disas/disas-mon.c
    A disas/disas-target.c
    R disas/disas.c
    M disas/meson.build
    A disas/objdump.c
    M include/disas/disas.h
    M include/exec/cpu_ldst.h
    M include/exec/plugin-gen.h
    M include/exec/translator.h
    M include/qemu/plugin.h
    M include/qemu/qemu-plugin.h
    M include/qemu/typedefs.h
    M include/tcg/tcg.h
    M plugins/api.c
    M target/alpha/translate.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.c
    M target/avr/translate.c
    M target/cris/translate.c
    M target/cris/translate_v10.c.inc
    M target/hexagon/translate.c
    M target/hppa/translate.c
    M target/i386/tcg/translate.c
    M target/loongarch/tcg/translate.c
    M target/m68k/translate.c
    M target/microblaze/translate.c
    M target/mips/tcg/translate.c
    M target/openrisc/translate.c
    M target/ppc/translate.c
    M target/riscv/translate.c
    M target/rx/translate.c
    M target/s390x/tcg/translate.c
    M target/sh4/translate.c
    M target/sparc/translate.c
    M target/tricore/translate.c
    M target/xtensa/translate.c
    M tcg/loongarch64/tcg-target.c.inc
    M tcg/tcg.c

  Log Message:
  -----------
  Merge tag 'pull-tcg-20240515' of https://gitlab.com/rth7680/qemu into staging

tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs
accel/tcg: Improve disassembly for target and plugin

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZEXT0dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/FbQf+P3ppcAA+5smxaQyi
# dsfCJaGOMqRTWYuSmNsJ7AlxQobxLKVsJrAHraNU1AnDfwKrX3XXJcU4Gwt0eQyN
# lGiF/24KLElvb+w6fkjuLdK+DbGWTrNabXJAnBw1h21x+go0mvVCVSuQQw7a/RDS
# btPnGkmoi0H340JC1MVSDRgFkB3RV0kOMXGGm70S+mw0WhjVgdInhLv0jjnj2QFM
# tYzJ5g+00v0HPo8Lun5kRSaI7EGG7J/XfGa71WHIHrB0o7FAzslap4fGTcfOB+7a
# f2jTGErezJQj1pvJLvFTNX4YQ02ORnDKsz4EC0G9QU8rk+S1bD2vTVoi5IY5ayfJ
# oqxyRw==
# =Q16M
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 15 May 2024 08:59:09 AM CEST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* tag 'pull-tcg-20240515' of https://gitlab.com/rth7680/qemu: (34 commits)
  tcg/loongarch64: Fill out tcg_out_{ld,st} for vector regs
  accel/tcg: Remove cpu_ldsb_code / cpu_ldsw_code
  target/s390x: Use translator_lduw in get_next_pc
  target/xtensa: Use translator_ldub in xtensa_insn_len
  target/rx: Use translator_ld*
  target/riscv: Use translator_ld* for everything
  target/cris: Use cris_fetch in translate_v10.c.inc
  target/cris: Use translator_ld* in cris_fetch
  target/avr: Use translator_lduw
  target/i386: Use translator_ldub for everything
  target/microblaze: Use translator_ldl
  target/hexagon: Use translator_ldl in pkt_crosses_page
  target/s390x: Disassemble EXECUTEd instructions
  target/s390x: Fix translator_fake_ld length
  accel/tcg: Introduce translator_fake_ld
  disas: Use translator_st to get disassembly data
  disas: Split disas.c
  accel/tcg: Return bool from TranslatorOps.disas_log
  accel/tcg: Provide default implementation of disas_log
  plugins: Merge  alloc_tcg_plugin_context into plugin_gen_tb_start
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 922582ace2df59572a671f5c0c5c6c5c706995e5
      
https://github.com/qemu/qemu/commit/922582ace2df59572a671f5c0c5c6c5c706995e5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-15 (Wed, 15 May 2024)

  Changed paths:
    M linux-user/elfload.c
    M linux-user/hppa/cpu_loop.c
    M linux-user/hppa/signal.c
    M linux-user/hppa/target_cpu.h
    M target/hppa/cpu.c
    M target/hppa/cpu.h
    M target/hppa/fpu_helper.c
    M target/hppa/gdbstub.c
    M target/hppa/helper.c
    M target/hppa/helper.h
    M target/hppa/int_helper.c
    M target/hppa/mem_helper.c
    M target/hppa/op_helper.c
    M target/hppa/sys_helper.c
    M target/hppa/translate.c

  Log Message:
  -----------
  Merge tag 'pull-hppa-20240515' of https://gitlab.com/rth7680/qemu into staging

target/hppa:
  - Use TCG_COND_TST where applicable.
  - Use CF_BP_PAGE instead of a local breakpoint search.
  - Clean up IAOQ handling during translation.
  - Implement CF_PCREL.
  - Implement PSW.B.
  - Implement PSW.X.
  - Log cpu state on interrupt and rfi.

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmZEgnwdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+43gf8CakQdMSqfGV2nGP+
# 7wWZOAV04IyfkJ38F/CH0ihUkblEOzXJ1shTFkrHEw257j0D10MctSSbjrqz5BwU
# obQcwoVlxzTGXqzhkZ6wagkcqjv3TtlPtznZIk6JssdlrtwIKDmE2/3t1dzHnyBD
# WTrS0SK3YvVRovq/ai51raUbiBsNq7XG3skHEsMKsFxp4EaDP5JTbputdQWdffjh
# TBmXImhHC3gm09KWIUZwfEBHlaa7YXk2orzB8kBE8S2kQj9vrGXEaC4jYnBcQLPw
# NDDkBYRqxHYQr0vIAHee+5cUgt1jDBr5rXnAnJwzK0wyEEc4Mi4OTPhNE604iu2y
# SDxS8Q==
# =A4Qf
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 15 May 2024 11:38:04 AM CEST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[ultimate]

* tag 'pull-hppa-20240515' of https://gitlab.com/rth7680/qemu: (43 commits)
  target/hppa: Log cpu state on return-from-interrupt
  target/hppa: Log cpu state at interrupt
  target/hppa: Implement CF_PCREL
  target/hppa: Adjust priv for B,GATE at runtime
  target/hppa: Drop tlb_entry return from hppa_get_physical_address
  target/hppa: Implement PSW_X
  target/hppa: Implement PSW_B
  target/hppa: Manage PSW_X and PSW_B in translator
  target/hppa: Split PSW X and B into their own field
  target/hppa: Improve hppa_cpu_dump_state
  target/hppa: Do not mask in copy_iaoq_entry
  target/hppa: Store full iaoq_f and page offset of iaoq_b in TB
  linux-user/hppa: Force all code addresses to PRIV_USER
  target/hppa: Use delay_excp for conditional trap on overflow
  target/hppa: Use delay_excp for conditional traps
  target/hppa: Introduce DisasDelayException
  target/hppa: Remove cond_free
  target/hppa: Use TCG_COND_TST* in trans_ftest
  target/hppa: Use registerfields.h for FPSR
  target/hppa: Use TCG_COND_TST* in trans_bb_imm
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/265aad58e9ca...922582ace2df

To unsubscribe from these emails, change your notification settings at 
https://github.com/qemu/qemu/settings/notifications
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld*, Richard Henderson <=
- [Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld*, Richard Henderson, 2024/05/15
Prev by Date: [Qemu-commits] [qemu/qemu] 415826: Allow UNIX socket option for VNC websocket
Next by Date: [Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld*
Previous by thread: [Qemu-commits] [qemu/qemu] 415826: Allow UNIX socket option for VNC websocket
Next by thread: [Qemu-commits] [qemu/qemu] 801894: accel/tcg: Use vaddr in translator_ld*
Index(es):
- Date
- Thread