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[Qemu-commits] [qemu/qemu] 507281: target/ppc: add external PID support
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[Qemu-commits] [qemu/qemu] 507281: target/ppc: add external PID support |
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Date: |
Thu, 08 Nov 2018 07:13:48 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 50728199c549467b01609ddbb831237f72c8f3f6
https://github.com/qemu/qemu/commit/50728199c549467b01609ddbb831237f72c8f3f6
Author: Roman Kapl <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/cpu.h
M target/ppc/helper.h
M target/ppc/mem_helper.c
M target/ppc/mmu_helper.c
M target/ppc/translate.c
M target/ppc/translate/fp-impl.inc.c
M target/ppc/translate/fp-ops.inc.c
M target/ppc/translate_init.inc.c
Log Message:
-----------
target/ppc: add external PID support
External PID is a mechanism present on BookE 2.06 that enables application to
store/load data from different address spaces. There are special version of some
instructions, which operate on alternate address space, which is specified in
the EPLC/EPSC regiser.
This implementation uses two additional MMU modes (mmu_idx) to provide the
address space for the load and store instructions. The QEMU TLB fill code was
modified to recognize these MMU modes and use the values in EPLC/EPSC to find
the proper entry in he PPC TLB. These two QEMU TLBs are also flushed on each
write to EPLC/EPSC.
Following instructions are implemented: dcbfep dcbstep dcbtep dcbtstep dcbzep
dcbzlep icbiep lbepx ldepx lfdepx lhepx lwepx stbepx stdepx stfdepx sthepx
stwepx.
Following vector instructions are not: evlddepx evstddepx lvepx lvepxl stvepx
stvepxl.
Signed-off-by: Roman Kapl <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 7b0f4ec9d3ae66ef3b96b05d691d56aa9005ef5b
https://github.com/qemu/qemu/commit/7b0f4ec9d3ae66ef3b96b05d691d56aa9005ef5b
Author: Cédric Le Goater <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/ppc440_pcix.c
Log Message:
-----------
ppc440_pcix: convert SysBus init method to a realize method
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 95ba5567073c89e8f63557c930bc82d45a8e7c2e
https://github.com/qemu/qemu/commit/95ba5567073c89e8f63557c930bc82d45a8e7c2e
Author: Cédric Le Goater <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/ppc4xx_pci.c
Log Message:
-----------
ppc4xx_pci: convert SysBus init method to a realize method
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 73785b329e12bddae32201e4e1d84e0909c21364
https://github.com/qemu/qemu/commit/73785b329e12bddae32201e4e1d84e0909c21364
Author: Cédric Le Goater <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/pci-host/ppce500.c
Log Message:
-----------
PPC: e500: convert SysBus init method to a realize method
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 0e947a89ce5911ccc92972e4057dfe7d0643e8f7
https://github.com/qemu/qemu/commit/0e947a89ce5911ccc92972e4057dfe7d0643e8f7
Author: Thomas Huth <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M default-configs/ppc64-softmmu.mak
M hw/ppc/Makefile.objs
M hw/ppc/spapr.c
M hw/ppc/spapr_rng.c
M include/hw/ppc/spapr.h
Log Message:
-----------
hw/ppc/spapr_rng: Introduce CONFIG_SPAPR_RNG switch for spapr_rng.c
The spapr-rng device is suboptimal when compared to virtio-rng, so
users might want to disable it in their builds. Thus let's introduce
a proper CONFIG switch to allow us to compile QEMU without this device.
The function spapr_rng_populate_dt is required for linking, so move it
to a different location.
Signed-off-by: Thomas Huth <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 13c9115fa9d23cf2afad4223b665149d8364d71d
https://github.com/qemu/qemu/commit/13c9115fa9d23cf2afad4223b665149d8364d71d
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Split up float_invalid_op_excp
The always_inline trick only works if the function is always
called from the outer-most helper. But it isn't, so pass in
the outer-most return address. There's no need for a switch
statement whose argument is always a constant. Unravel the
switch and goto via more helpers.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 6525aadc1201ae55e18cedaa8a9f2d1831e700f8
https://github.com/qemu/qemu/commit/6525aadc1201ae55e18cedaa8a9f2d1831e700f8
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Remove float_check_status
Use do_float_check_status directly, so that we don't get confused
about which return address we're using. And definitely don't use
helper_float_check_status.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 0394d7a68474f4144d7e2f5eb9dd8e6a87d01bef
https://github.com/qemu/qemu/commit/0394d7a68474f4144d7e2f5eb9dd8e6a87d01bef
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Introduce fp number classification
Having a separate, logical classifiation of numbers will
unify more error paths for different formats.
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 57483867e9eda2b34ce4bb2aaf90b2f35bf375c0
https://github.com/qemu/qemu/commit/57483867e9eda2b34ce4bb2aaf90b2f35bf375c0
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Split out float_invalid_op_addsub
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 4f0da706c20146bf17bf444653b7afa1296fc777
https://github.com/qemu/qemu/commit/4f0da706c20146bf17bf444653b7afa1296fc777
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Split out float_invalid_op_mul
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: fec59ef30c329625f97844460713322172e423c7
https://github.com/qemu/qemu/commit/fec59ef30c329625f97844460713322172e423c7
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Split out float_invalid_op_div
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: a3dec427e01550d60d7f2f9dab535f86066c0973
https://github.com/qemu/qemu/commit/a3dec427e01550d60d7f2f9dab535f86066c0973
Author: Richard Henderson <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/fpu_helper.c
Log Message:
-----------
target/ppc: Split out float_invalid_cvt
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 4fc4c6a53d69af50c4421857c749f84f927d09f6
https://github.com/qemu/qemu/commit/4fc4c6a53d69af50c4421857c749f84f927d09f6
Author: Greg Kurz <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: convert g_malloc() to g_new()
When allocating an array, it is a recommended coding practice to call
g_new(FooType, n) instead of g_malloc(n * sizeof(FooType)) because
it takes care to avoid overflow when calculating the size of the
allocated block and it returns FooType *, which allows the compiler
to perform type checking.
Signed-off-by: Greg Kurz <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 0c2adc175398c37cc40b0164849aada9ad9c56c4
https://github.com/qemu/qemu/commit/0c2adc175398c37cc40b0164849aada9ad9c56c4
Author: Dr. David Alan Gilbert <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/misc/macio/pmu.c
Log Message:
-----------
macio/pmu: Fix missing vmsd terminator
Fix missing terminator in VMStateDescription
Fixes: d811d61fbc6ca5f2be2185fd7cfa916e7ba613ce
Signed-off-by: Dr. David Alan Gilbert <address@hidden>
Reviewed-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 1bbd6272a18d6fe3390d4b4200a1a7a566b304fa
https://github.com/qemu/qemu/commit/1bbd6272a18d6fe3390d4b4200a1a7a566b304fa
Author: Peter Maydell <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/mac_newworld.c
Log Message:
-----------
hw/ppc/mac_newworld: Free openpic_irqs array after use
In ppc_core99_init(), we allocate an openpic_irqs array, which
we then use to collect up the various qemu_irqs which we're
going to connect to the interrupt controller. Once we've
called sysbus_connect_irq() to connect them all up, the
array is no longer required, but we forgot to free it.
Since board init is only run once at startup, the memory
leak is not a significant one.
Spotted by Coverity: CID 1192916.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: b8edea50a7b8fba52ec3d8222f09991bea8add85
https://github.com/qemu/qemu/commit/b8edea50a7b8fba52ec3d8222f09991bea8add85
Author: Pavel Dovgalyuk <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
target/ppc: fix mtmsr instruction for icount
This patch fixes processing of mtmsr instructions in icount mode.
In this mode writing to interrupt/peripheral state is controlled
by can_do_io flag. This flag must be set explicitly before helper
function invocation.
Signed-off-by: Maria Klimushenkova <address@hidden>
Signed-off-by: Pavel Dovgalyuk <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: d07945e78eb6b593cd17a4640c1fc9eb35e3245d
https://github.com/qemu/qemu/commit/d07945e78eb6b593cd17a4640c1fc9eb35e3245d
Author: Prasad J Pandit <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/pnv_lpc.c
Log Message:
-----------
ppc/pnv: check size before data buffer access
While performing PowerNV memory r/w operations, the access length
'sz' could exceed the data[4] buffer size. Add check to avoid OOB
access.
Reported-by: Moguofang <address@hidden>
Signed-off-by: Prasad J Pandit <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: bba8e23affb87622ce4a9ee3195729dbc4c3faac
https://github.com/qemu/qemu/commit/bba8e23affb87622ce4a9ee3195729dbc4c3faac
Author: Alexander Graf <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: PPC: Remove myself
I haven't really been maintaining any PowerPC code for quite a while now,
so let's reflect reality: David does all the work and embedded PPC is in
"Odd Fixes" state rather than supported now.
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 09a333ee3dbbc6cdd88830f5b68dc358cacb0093
https://github.com/qemu/qemu/commit/09a333ee3dbbc6cdd88830f5b68dc358cacb0093
Author: Peter Maydell <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/ppc440_uc.c
Log Message:
-----------
hw/ppc/ppc440_uc: Remove dead code in sdram_size()
Coverity points out in CID 1390588 that the test for sh == 0
in sdram_size() can never fire, because we calculate sh with
sh = 1024 - ((bcr >> 6) & 0x3ff);
which must result in a value between 1 and 1024 inclusive.
Without the relevant manual for the SoC, we're not completely
sure of the correct behaviour here, but we can remove the
dead code without changing how QEMU currently behaves.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: a59d628f92d8b27deb67387cd26642c3ffac2b06
https://github.com/qemu/qemu/commit/a59d628f92d8b27deb67387cd26642c3ffac2b06
Author: Maria Klimushenkova <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/translate.c
Log Message:
-----------
This patch fixes processing of rfi instructions in icount mode.
In this mode writing to interrupt/peripheral state is controlled
by can_do_io flag. This flag must be set explicitly before helper
function invocation.
Signed-off-by: Maria Klimushenkova <address@hidden>
Signed-off-by: Pavel Dovgalyuk <address@hidden>
Tested-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 56de52cad954a94530953bf979007db84c5f4dbb
https://github.com/qemu/qemu/commit/56de52cad954a94530953bf979007db84c5f4dbb
Author: Suraj Jitindar Singh <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M target/ppc/translate_init.inc.c
Log Message:
-----------
target/ppc: Add one reg id for ptcr
The ptcr (partition table control register) is used to store the address
and size of the partition table. For nested kvm-hv we have a level 1
guest register the location of it's partition table with the hypervisor.
Thus to support migration we need to be able to read this out of kvm
and restore it post migration.
Add the one reg id for the ptcr.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: b9a477b725788e47bf653eab36e64f232d259f2a
https://github.com/qemu/qemu/commit/b9a477b725788e47bf653eab36e64f232d259f2a
Author: Suraj Jitindar Singh <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_caps.c
M include/hw/ppc/spapr.h
M target/ppc/kvm.c
M target/ppc/kvm_ppc.h
Log Message:
-----------
ppc/spapr_caps: Add SPAPR_CAP_NESTED_KVM_HV
Add the spapr cap SPAPR_CAP_NESTED_KVM_HV to be used to control the
availability of nested kvm-hv to the level 1 (L1) guest.
Assuming a hypervisor with support enabled an L1 guest can be allowed to
use the kvm-hv module (and thus run it's own kvm-hv guests) by setting:
-machine pseries,cap-nested-hv=true
or disabled with:
-machine pseries,cap-nested-hv=false
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Commit: 7360be896a928d9c75894f34e8e620b82bbc1676
https://github.com/qemu/qemu/commit/7360be896a928d9c75894f34e8e620b82bbc1676
Author: Peter Maydell <address@hidden>
Date: 2018-11-08 (Thu, 08 Nov 2018)
Changed paths:
M MAINTAINERS
M default-configs/ppc64-softmmu.mak
M hw/misc/macio/pmu.c
M hw/pci-host/ppce500.c
M hw/ppc/Makefile.objs
M hw/ppc/mac_newworld.c
M hw/ppc/pnv_lpc.c
M hw/ppc/ppc440_pcix.c
M hw/ppc/ppc440_uc.c
M hw/ppc/ppc4xx_pci.c
M hw/ppc/spapr.c
M hw/ppc/spapr_caps.c
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_rng.c
M include/hw/ppc/spapr.h
M target/ppc/cpu.h
M target/ppc/fpu_helper.c
M target/ppc/helper.h
M target/ppc/kvm.c
M target/ppc/kvm_ppc.h
M target/ppc/mem_helper.c
M target/ppc/mmu_helper.c
M target/ppc/translate.c
M target/ppc/translate/fp-impl.inc.c
M target/ppc/translate/fp-ops.inc.c
M target/ppc/translate_init.inc.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20181108' into
staging
ppc patch queue 2018-11-08
Here's another patch of accumulated ppc patches for qemu-3.1.
Highlights are:
* Support for nested HV KVM on POWER9 hosts
* Remove Alex Graf as ppc maintainer
* Emulation of external PID instructions
# gpg: Signature made Thu 08 Nov 2018 12:14:27 GMT
# gpg: using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>"
# gpg: aka "David Gibson (Red Hat) <address@hidden>"
# gpg: aka "David Gibson (ozlabs.org) <address@hidden>"
# gpg: aka "David Gibson (kernel.org) <address@hidden>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-3.1-20181108: (22 commits)
ppc/spapr_caps: Add SPAPR_CAP_NESTED_KVM_HV
target/ppc: Add one reg id for ptcr
This patch fixes processing of rfi instructions in icount mode.
hw/ppc/ppc440_uc: Remove dead code in sdram_size()
MAINTAINERS: PPC: Remove myself
ppc/pnv: check size before data buffer access
target/ppc: fix mtmsr instruction for icount
hw/ppc/mac_newworld: Free openpic_irqs array after use
macio/pmu: Fix missing vmsd terminator
spapr_pci: convert g_malloc() to g_new()
target/ppc: Split out float_invalid_cvt
target/ppc: Split out float_invalid_op_div
target/ppc: Split out float_invalid_op_mul
target/ppc: Split out float_invalid_op_addsub
target/ppc: Introduce fp number classification
target/ppc: Remove float_check_status
target/ppc: Split up float_invalid_op_excp
hw/ppc/spapr_rng: Introduce CONFIG_SPAPR_RNG switch for spapr_rng.c
PPC: e500: convert SysBus init method to a realize method
ppc4xx_pci: convert SysBus init method to a realize method
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/0b57007755c2...7360be896a92
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