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[Qemu-commits] [qemu/qemu] b78aae: hw/arm/smmu-common: Fix devfn computa
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[Qemu-commits] [qemu/qemu] b78aae: hw/arm/smmu-common: Fix devfn computation in smmu_... |
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Mon, 09 Jul 2018 08:10:42 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b78aae9bb65876baa47b73d5cf63372171630bf9
https://github.com/qemu/qemu/commit/b78aae9bb65876baa47b73d5cf63372171630bf9
Author: Eric Auger <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/arm/smmu-common.c
M include/hw/arm/smmu-common.h
Log Message:
-----------
hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mr
smmu_iommu_mr() aims at returning the IOMMUMemoryRegion corresponding
to a given sid. The function extracts both the PCIe bus number and
the devfn to return this data. Current computation of devfn is wrong
as it only returns the PCIe function instead of slot | function.
Fixes 32cfd7f39e08 ("hw/arm/smmuv3: Cache/invalidate config data")
Signed-off-by: Eric Auger <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 086ede32afc9c70de3d75c4fb91c63db790cbd5c
https://github.com/qemu/qemu/commit/086ede32afc9c70de3d75c4fb91c63db790cbd5c
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/core/ptimer.c
M include/hw/ptimer.h
M tests/ptimer-test.c
Log Message:
-----------
ptimer: Add TRIGGER_ONLY_ON_DECREMENT policy option
The CMSDK timer behaviour is that an interrupt is triggered when the
counter counts down from 1 to 0; however one is not triggered if the
counter is manually set to 0 by a guest write to the counter register.
Currently ptimer can't handle this; add a policy option to allow
a ptimer user to request this behaviour.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Commit: 6583080ed87ea218acae59f1c52b7b11ffec240d
https://github.com/qemu/qemu/commit/6583080ed87ea218acae59f1c52b7b11ffec240d
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/timer/cmsdk-apb-timer.c
Log Message:
-----------
hw/timer/cmsdk-apb-timer: Correct ptimer policy settings
The CMSDK timer interrupt triggers when the counter goes from 1 to 0,
so we want to trigger immediately, rather than waiting for a
clock cycle. Drop the incorrect NO_IMMEDIATE_TRIGGER setting.
We also do not want to get an interrupt if the guest sets the
counter directly to zero, so use the new TRIGGER_ONLY_ON_DECREMENT
policy.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Commit: 0e256833085cc9d292e59a5bda9b886fd09a5f83
https://github.com/qemu/qemu/commit/0e256833085cc9d292e59a5bda9b886fd09a5f83
Author: Guenter Roeck <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/timer/cmsdk-apb-timer.c
Log Message:
-----------
hw/timer/cmsdk-apb-timer: Correctly identify and set one-shot mode
The CMSDK APB timer is currently always configured as periodic timer.
This results in the following messages when trying to boot Linux.
Timer with delta zero, disabling
If the timer limit set with the RELOAD command is 0, the timer
needs to be enabled as one-shot timer.
Signed-off-by: Guenter Roeck <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Tested-by: Guenter Roeck <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1a9b30646edd8d10caaa9727611750bf57d08c74
https://github.com/qemu/qemu/commit/1a9b30646edd8d10caaa9727611750bf57d08c74
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/timer/cmsdk-apb-timer.c
Log Message:
-----------
hw/timer/cmsdk-apb-timer: run or stop timer on writes to RELOAD and VALUE
If the CMSDK APB timer is set up with a zero RELOAD value
then it will count down to zero, fire once and then stay
at zero. From the point of view of the ptimer system, the
timer is disabled; but the enable bit in the CTRL register
is still set and if the guest subsequently writes to the
RELOAD or VALUE registers this should cause the timer to
start counting down again.
Add code to the write paths for RELOAD and VALUE so that
we correctly restart the timer in this situation.
Conversely, if the new RELOAD and VALUE are both zero,
we should stop the ptimer.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Tested-by: Guenter Roeck <address@hidden>
Message-id: address@hidden
Commit: 2f95a3b09aebdcb5c9152a7ac434a5d57441fe82
https://github.com/qemu/qemu/commit/2f95a3b09aebdcb5c9152a7ac434a5d57441fe82
Author: Richard Henderson <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M target/arm/translate-sve.c
Log Message:
-----------
target/arm: Suppress Coverity warning for PRF
These instructions must perform the sve_access_check, but
since they are implemented as NOPs there is no generated
code to elide when the access check fails.
Fixes: Coverity issues 1393780 & 1393779.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 499748d7683198a765d17b4fdf6901ab9dca920c
https://github.com/qemu/qemu/commit/499748d7683198a765d17b4fdf6901ab9dca920c
Author: Richard Henderson <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M tcg/tcg-op-gvec.c
Log Message:
-----------
tcg: Restrict check_size_impl to multiples of the line size
Normally this is automatic in the size restrictions that are placed
on vector sizes coming from the implementation. However, for the
legitimate size tuple [oprsz=8, maxsz=32], we need to clear the final
24 bytes of the vector register. Without this check, do_dup selects
TCG_TYPE_V128 and clears only 16 bytes.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 973558a3f869e591d2406dd8226ec0c4e32a3c3e
https://github.com/qemu/qemu/commit/973558a3f869e591d2406dd8226ec0c4e32a3c3e
Author: Richard Henderson <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M target/arm/translate-sve.c
Log Message:
-----------
target/arm: Fix do_predset for large VL
Use MAKE_64BIT_MASK instead of open-coding. Remove an odd
vector size check that is unlikely to be more profitable
than 3 64-bit integer stores. Correct the iteration for WORD
to avoid writing too much data.
Fixes RISU tests of PTRUE for VL 256.
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Tested-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 7abf56eed13a2338b8d3eda60e0d3c4e490a663f
https://github.com/qemu/qemu/commit/7abf56eed13a2338b8d3eda60e0d3c4e490a663f
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/sd/omap_mmc.c
Log Message:
-----------
hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
DeviceClass::reset models a "cold power-on" reset which can
also be used to powercycle a device; but there is no "hot reset"
(a.k.a. soft-reset) method available.
The OMAP MMC Power-Up Control bit is not designed to powercycle
a card, but to disable it without powering it off (pseudo-reset):
Multimedia Card (MMC/SD/SDIO) Interface [SPRU765A]
MMC_CON[11] Power-Up Control (POW)
This bit must be set to 1 before any valid transaction to either
MMC/SD or SPI memory cards.
When 1, the card is considered powered-up and the controller core
is enabled.
When 0, the card is considered powered-down (system dependent),
and the controller core logic is in pseudo-reset state. This is,
the MMC_STAT flags and the FIFO pointers are reset, any access to
MMC_DATA[DATA] has no effect, a write into the MMC.CMD register
is ignored, and a setting of MMC_SPI[STR] to 1 is ignored.
By splitting the 'pseudo-reset' code out of the 'power-on' reset
function, this patch fixes a latent bug in omap_mmc_write(MMC_CON)i
recently exposed by ecd219f7abb.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 5bd366b467fd23d0530580573b2024d3962222c3
https://github.com/qemu/qemu/commit/5bd366b467fd23d0530580573b2024d3962222c3
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M include/hw/boards.h
Log Message:
-----------
boards.h: Remove doc comment reference to nonexistent function
commit b08199c6fbea1 accidentally added a reference to a doc
comment to a nonexistent memory_region_allocate_aux_memory().
This was a leftover from a previous version of the patchset
which defined memory_region_allocate_aux_memory() for
"allocate RAM MemoryRegion and register it for migration"
and left "memory_region_init_ram()" with its original semantics
of "allocate RAM MR but do not register for migration". In
the end we decided on the approach of "memory_region_init_ram()
registers the MR for migration, and memory_region_init_ram_nomigrate()
is a new function which does not", but this comment change
got left in by mistake. Revert that part of the commit.
Reported-by: Thomas Huth <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Commit: 8fad0a65582c0a6e324580f45516461e9b6aa439
https://github.com/qemu/qemu/commit/8fad0a65582c0a6e324580f45516461e9b6aa439
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/net/dp8393x.c
Log Message:
-----------
hw/net/dp8393x: don't make prom region 'nomigrate'
Currently we use memory_region_init_rom_nomigrate() to create
the "dp3893x-prom" memory region, and we don't manually register
it with vmstate_register_ram(). This currently means that its
contents are migrated but as a ram block whose name is the empty
string; in future it may mean they are not migrated at all. Use
memory_region_init_ram() instead.
Note that this is a a cross-version migration compatibility break
for the MIPS "magnum" and "pica61" machines.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Message-id: address@hidden
Commit: 6d1d4276aea9773af97fed651cb205aab4f1b163
https://github.com/qemu/qemu/commit/6d1d4276aea9773af97fed651cb205aab4f1b163
Author: Peter Maydell <address@hidden>
Date: 2018-07-09 (Mon, 09 Jul 2018)
Changed paths:
M hw/arm/smmu-common.c
M hw/core/ptimer.c
M hw/net/dp8393x.c
M hw/sd/omap_mmc.c
M hw/timer/cmsdk-apb-timer.c
M include/hw/arm/smmu-common.h
M include/hw/boards.h
M include/hw/ptimer.h
M target/arm/translate-sve.c
M tcg/tcg-op-gvec.c
M tests/ptimer-test.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180709'
into staging
target-arm queue:
* hw/net/dp8393x: don't make prom region 'nomigrate'
* boards.h: Remove doc comment reference to nonexistent function
* hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
* target/arm: Fix do_predset for large VL
* tcg: Restrict check_size_impl to multiples of the line size
* target/arm: Suppress Coverity warning for PRF
* hw/timer/cmsdk-apb-timer: fix minor corner-case bugs and
suppress spurious warnings when running Linux's timer driver
* hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mr
# gpg: Signature made Mon 09 Jul 2018 14:53:38 BST
# gpg: using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20180709:
hw/net/dp8393x: don't make prom region 'nomigrate'
boards.h: Remove doc comment reference to nonexistent function
hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
target/arm: Fix do_predset for large VL
tcg: Restrict check_size_impl to multiples of the line size
target/arm: Suppress Coverity warning for PRF
hw/timer/cmsdk-apb-timer: run or stop timer on writes to RELOAD and VALUE
hw/timer/cmsdk-apb-timer: Correctly identify and set one-shot mode
hw/timer/cmsdk-apb-timer: Correct ptimer policy settings
ptimer: Add TRIGGER_ONLY_ON_DECREMENT policy option
hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mr
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/a98ff0ec2ba3...6d1d4276aea9
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