[Qemu-commits] [qemu/qemu] 57f5c1: target/sh4: do not check for PR bit f

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[Qemu-commits] [qemu/qemu] 57f5c1: target/sh4: do not check for PR bit f

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 57f5c1: target/sh4: do not check for PR bit for fabs instr...
Date:	Wed, 19 Jul 2017 08:30:44 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 57f5c1b093e1c3ec185770d2a180259205f980be
      
https://github.com/qemu/qemu/commit/57f5c1b093e1c3ec185770d2a180259205f980be
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: do not check for PR bit for fabs instruction

The SH4 manual is not fully clear about that, but real hardware do not
check for the PR bit, which allows to select between single or double
precision, for the fabs instruction. This is probably what is meant by
"Same operation is performed regardless of precision."

Remove the check, and at the same time use a TCG instruction instead of
a helper to clear one bit.

LP: https://bugs.launchpad.net/qemu/+bug/1701821
Reported-by: Bruno Haible <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: fea7d77d3ea287d3b1878648f3049fc6bb4fd57b
      
https://github.com/qemu/qemu/commit/fea7d77d3ea287d3b1878648f3049fc6bb4fd57b
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/op_helper.c

  Log Message:
  -----------
  target/sh4: fix FPU unorderered compare

In case of unordered compare, the fcmp instructions should either
trigger and invalid exception (if enabled) or set T=0. The existing code
left it unchanged.

LP: https://bugs.launchpad.net/qemu/+bug/1701821
Reported-by: Bruno Haible <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 801f4dac57dad6b340ff3f60c5d9b045a2c68a0e
      
https://github.com/qemu/qemu/commit/801f4dac57dad6b340ff3f60c5d9b045a2c68a0e
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/op_helper.c

  Log Message:
  -----------
  target/sh4: fix FPSCR cause vs flag inversion

The floating-point status/control register contains cause and flag
bits. The cause bits are set to 0 before executing the instruction,
while the flag bits hold the status of the exception generated after
the field was last cleared.

Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 82e8251374568ba63343b695925c883a7da3db6f
      
https://github.com/qemu/qemu/commit/82e8251374568ba63343b695925c883a7da3db6f
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: do not use a helper to implement fneg

There is no need to use a helper to flip one bit, just use a TCG xor
instruction instead.

Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 92f1f83e34f0454b98f3a7fc082636c38cafa115
      
https://github.com/qemu/qemu/commit/92f1f83e34f0454b98f3a7fc082636c38cafa115
  Author: Aurelien Jarno <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: return result of fcmp using TCG

Since that the T bit of the SR register is mapped using a TGC global,
it's better to return the value through TCG than writing it directly. It
allows to declare the helpers with the flag TCG_CALL_NO_WG.

Reviewed-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 4448a83606b5861cfa11528c0395868fc2b0e99e
      
https://github.com/qemu/qemu/commit/4448a83606b5861cfa11528c0395868fc2b0e99e
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Consolidate end-of-TB tests

We can fold 3 different tests within the decode loop
into a more accurate computation of max_insns to start.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: e1933d1435d1d0ace7c93bdc429f7e4f0c499e92
      
https://github.com/qemu/qemu/commit/e1933d1435d1d0ace7c93bdc429f7e4f0c499e92
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/cpu.h
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK

We'll be putting more things into this bitmask soon.
Let's have a name that covers all possible uses.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: ca69176d52ca1b9c9c7a4229ca46cf858167c5e8
      
https://github.com/qemu/qemu/commit/ca69176d52ca1b9c9c7a4229ca46cf858167c5e8
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/cpu.c
    M target/sh4/cpu.h

  Log Message:
  -----------
  target/sh4: Keep env->flags clean

If we mask off any out-of-band bits before we assign to the
variable, then we don't need to clean it up when reading.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 1516184d8ea04f9ebd5d5c2009a2b795fc33b82a
      
https://github.com/qemu/qemu/commit/1516184d8ea04f9ebd5d5c2009a2b795fc33b82a
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/cpu.h

  Log Message:
  -----------
  target/sh4: Adjust TB_FLAG_PENDING_MOVCA

Don't leave an unused bit after DELAY_SLOT_MASK.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 4bfa602bc2227f5b5a506a4c0c20657d68eaefd1
      
https://github.com/qemu/qemu/commit/4bfa602bc2227f5b5a506a4c0c20657d68eaefd1
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/cpu.h
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Handle user-space atomics

For uniprocessors, SH4 uses optimistic restartable atomic sequences.
Upon an interrupt, a real kernel would simply notice magic values in
the registers and reset the PC to the start of the sequence.

For QEMU, we cannot do this in quite the same way.  Instead, we notice
the normal start of such a sequence (mov #-x,r15), and start a new TB
that can be executed under cpu_exec_step_atomic.

Reported-by: Bruno Haible  <address@hidden>
LP: https://bugs.launchpad.net/bugs/1701971
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: d6a6cffdd3d861c2cdd09253369bba50f9e3d891
      
https://github.com/qemu/qemu/commit/d6a6cffdd3d861c2cdd09253369bba50f9e3d891
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Recognize common gUSA sequences

For many of the sequences produced by gcc or glibc,
we can translate these as host atomic operations.
Which saves the need to acquire the exclusive lock.

Signed-off-by: Richard Henderson <address@hidden>

Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: b0e4f0edf575f72d8d76717ecbefa9c748ab467b
      
https://github.com/qemu/qemu/commit/b0e4f0edf575f72d8d76717ecbefa9c748ab467b
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user/sh4: Notice gUSA regions during signal delivery

We translate gUSA regions atomically in a parallel context.
But in a serial context a gUSA region may be interrupted.
In that case, restart the region as the kernel would.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: b0e9c51a00e0a71b2ab666140ee0ea31b2ed43d2
      
https://github.com/qemu/qemu/commit/b0e9c51a00e0a71b2ab666140ee0ea31b2ed43d2
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M linux-user/signal.c

  Log Message:
  -----------
  linux-user/sh4: Clean env->flags on signal boundaries

If a signal is delivered during the execution of a delay slot,
or a gUSA region, clear those bits from the environment so that
the signal handler does not start in that same state.

Cleaning the bits on signal return is paranoid good sense.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 3a3bb8d2b5db42fa250ee06e1bdfaac7c46d17c7
      
https://github.com/qemu/qemu/commit/3a3bb8d2b5db42fa250ee06e1bdfaac7c46d17c7
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Hoist register bank selection

Compute which register bank to use once at the start of translation.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 7c9f70386d1aae67055a9a278880cde6c278217c
      
https://github.com/qemu/qemu/commit/7c9f70386d1aae67055a9a278880cde6c278217c
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Unify cpu_fregs into FREG

We were treating FREG as an index and REG as a TCGv.
Making FREG return a TCGv is both less confusing and
a step toward cleaner banking of cpu_fregs.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix whitespace issues]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: e5d8053e76bda79744710e5b59e70f9fcbce7df7
      
https://github.com/qemu/qemu/commit/e5d8053e76bda79744710e5b59e70f9fcbce7df7
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Pass DisasContext to fpr64 routines

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix whitespace issues]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 5c13bad9ecf758946877d041bb3b9fd012f4503a
      
https://github.com/qemu/qemu/commit/5c13bad9ecf758946877d041bb3b9fd012f4503a
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Hoist fp register bank selection

Compute which register bank to use once at the start of translation.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 0f73753d621b2dddc87bc3d8889cab8636d41d15
      
https://github.com/qemu/qemu/commit/0f73753d621b2dddc87bc3d8889cab8636d41d15
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Eliminate unused XREG macro

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 1e0b21d856d7654ea683e743e964c3b292122081
      
https://github.com/qemu/qemu/commit/1e0b21d856d7654ea683e743e964c3b292122081
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Merge DREG into fpr64 routines

Also add a debugging assert that we did signal illegal opc
for odd double-precision registers.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix whitespace issues]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 4d57fa50d5208b92a06b0e08c32cc0bb7ab75aaf
      
https://github.com/qemu/qemu/commit/4d57fa50d5208b92a06b0e08c32cc0bb7ab75aaf
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Load/store Dr as 64-bit quantities

This enforces proper alignment and makes the register update
more natural.  Note that there is a more serious bug fix for
fmov {DX}Rn,@(R0,Rn) to use a store instead of a load.

Signed-off-by: Richard Henderson <address@hidden>

Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: bdcb3739024f3b6d53bd6dc34eaeafb3f2b996d9
      
https://github.com/qemu/qemu/commit/bdcb3739024f3b6d53bd6dc34eaeafb3f2b996d9
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Simplify 64-bit fp reg-reg move

We do not need to form full 64-bit quantities in order to perform
the move.  This reduces code expansion on 64-bit hosts.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: dec16c6ee8e665ec558f7564e68c09e01facf903
      
https://github.com/qemu/qemu/commit/dec16c6ee8e665ec558f7564e68c09e01facf903
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Unify code for CHECK_NOT_DELAY_SLOT

We do not need to emit N copies of raising an exception.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 6b98213da9b025dad0f1bd307928a4f30e96a50d
      
https://github.com/qemu/qemu/commit/6b98213da9b025dad0f1bd307928a4f30e96a50d
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Unify code for CHECK_PRIVILEGED

We do not need to emit N copies of raising an exception.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: dec4f042a16b830c4d4613561f5f29e6a3263c1f
      
https://github.com/qemu/qemu/commit/dec4f042a16b830c4d4613561f5f29e6a3263c1f
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Unify code for CHECK_FPU_ENABLED

We do not need to emit N copies of raising an exception.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 93dc9c89640bd4aa5e49d672209b5509e3afa7e8
      
https://github.com/qemu/qemu/commit/93dc9c89640bd4aa5e49d672209b5509e3afa7e8
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Tidy misc illegal insn checks

Now that we have a do_illegal label, use goto in order
to self-document the forcing of the exception.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix whitespace issues]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 7e9f7ca86f83886ab2fa9ac7573635d1d6d97cf0
      
https://github.com/qemu/qemu/commit/7e9f7ca86f83886ab2fa9ac7573635d1d6d97cf0
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Introduce CHECK_FPSCR_PR_*

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: ccae24d4985507d6a0cfc1c2f18f4dc60dedda89
      
https://github.com/qemu/qemu/commit/ccae24d4985507d6a0cfc1c2f18f4dc60dedda89
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Introduce CHECK_SH4A

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix conflict]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 907759f9979d512eb072b8c31c921a78e44b8aa9
      
https://github.com/qemu/qemu/commit/907759f9979d512eb072b8c31c921a78e44b8aa9
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Implement fpchg

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 61dedf2af79fb5866dc7a0f972093682f2185e17
      
https://github.com/qemu/qemu/commit/61dedf2af79fb5866dc7a0f972093682f2185e17
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Add missing FPSCR.PR == 0 checks

Both frchg and fschg require PR == 0, otherwise undefined_operation.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: 11b7aa234bc0cee6a2c6654993b2e083862f5216
      
https://github.com/qemu/qemu/commit/11b7aa234bc0cee6a2c6654993b2e083862f5216
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Implement fsrra

Signed-off-by: Richard Henderson <address@hidden>

Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: ec2eb22ebb3b36f39755414dcbe4f99c2c0562c9
      
https://github.com/qemu/qemu/commit/ec2eb22ebb3b36f39755414dcbe4f99c2c0562c9
  Author: Richard Henderson <address@hidden>
  Date:   2017-07-18 (Tue, 18 Jul 2017)

  Changed paths:
    M target/sh4/translate.c

  Log Message:
  -----------
  target/sh4: Use tcg_gen_lookup_and_goto_ptr

Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
[aurel32: fix whitespace]
Signed-off-by: Aurelien Jarno <address@hidden>


  Commit: a51568b78ea011e0f1e67664b8b0c6b693f8ee5a
      
https://github.com/qemu/qemu/commit/a51568b78ea011e0f1e67664b8b0c6b693f8ee5a
  Author: Peter Maydell <address@hidden>
  Date:   2017-07-19 (Wed, 19 Jul 2017)

  Changed paths:
    M linux-user/signal.c
    M target/sh4/cpu.c
    M target/sh4/cpu.h
    M target/sh4/helper.h
    M target/sh4/op_helper.c
    M target/sh4/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/aurel/tags/pull-target-sh4-20170718' 
into staging

Queued target/sh4 patches

# gpg: Signature made Tue 18 Jul 2017 22:44:25 BST
# gpg:                using RSA key 0xBA9C78061DDD8C9B
# gpg: Good signature from "Aurelien Jarno <address@hidden>"
# gpg:                 aka "Aurelien Jarno <address@hidden>"
# gpg:                 aka "Aurelien Jarno <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7746 2642 A9EF 94FD 0F77  196D BA9C 7806 1DDD 8C9B

* remotes/aurel/tags/pull-target-sh4-20170718: (31 commits)
  target/sh4: Use tcg_gen_lookup_and_goto_ptr
  target/sh4: Implement fsrra
  target/sh4: Add missing FPSCR.PR == 0 checks
  target/sh4: Implement fpchg
  target/sh4: Introduce CHECK_SH4A
  target/sh4: Introduce CHECK_FPSCR_PR_*
  target/sh4: Tidy misc illegal insn checks
  target/sh4: Unify code for CHECK_FPU_ENABLED
  target/sh4: Unify code for CHECK_PRIVILEGED
  target/sh4: Unify code for CHECK_NOT_DELAY_SLOT
  target/sh4: Simplify 64-bit fp reg-reg move
  target/sh4: Load/store Dr as 64-bit quantities
  target/sh4: Merge DREG into fpr64 routines
  target/sh4: Eliminate unused XREG macro
  target/sh4: Hoist fp register bank selection
  target/sh4: Pass DisasContext to fpr64 routines
  target/sh4: Unify cpu_fregs into FREG
  target/sh4: Hoist register bank selection
  linux-user/sh4: Clean env->flags on signal boundaries
  linux-user/sh4: Notice gUSA regions during signal delivery
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/6d60e295ef02...a51568b78ea0
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