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[Qemu-commits] [qemu/qemu] ad5171: tcg: Fix warning (1 bit signed bitfie
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[Qemu-commits] [qemu/qemu] ad5171: tcg: Fix warning (1 bit signed bitfield entry) and... |
Date: |
Thu, 24 Apr 2014 08:30:07 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: ad5171dbd419ffa9e10de766e1c3198f2ae62dfa
https://github.com/qemu/qemu/commit/ad5171dbd419ffa9e10de766e1c3198f2ae62dfa
Author: Stefan Weil <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/aarch64/tcg-target.c
M tcg/arm/tcg-target.c
M tcg/i386/tcg-target.c
M tcg/ppc/tcg-target.c
M tcg/tcg-be-ldst.h
Log Message:
-----------
tcg: Fix warning (1 bit signed bitfield entry) and replace int by bool
Static code analyzers complain about signed bitfields with only a single
bit. is_ld is used as a boolean value, so make it bool.
ppc64 already used bool for the 2nd argument is_ld of the local function
add_qemu_ldst_label. Modify all other TCG targets to do follow this
example.
Signed-off-by: Stefan Weil <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Commit: 20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a
https://github.com/qemu/qemu/commit/20022fa15f6a8ddc24a8f9d7d177312fecc7fb3a
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/README
Log Message:
-----------
tcg: Use "unspecified behavior" for shifts
Change the definition such that shifts are not allowed to crash
for any input.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Commit: 50c5c4d12557ede48c573e5138542061acd83500
https://github.com/qemu/qemu/commit/50c5c4d12557ede48c573e5138542061acd83500
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg: Mask shift quantities while folding
The TCG result would be undefined, but we can at least produce one
plausible result and avoid triggering the wrath of analysis tools.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Commit: 1976cccec8a9965ff3fd6f026783a04f6b4959fd
https://github.com/qemu/qemu/commit/1976cccec8a9965ff3fd6f026783a04f6b4959fd
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tci.c
Log Message:
-----------
tci: Mask shift counts to avoid undefined behavior
TCG now requires unspecified behavior rather than a potential crash,
bring the C shift within the letter of the law.
Signed-off-by: Richard Henderson <address@hidden>
Commit: d998e555d2a504d719b773b3164101aa36284a20
https://github.com/qemu/qemu/commit/d998e555d2a504d719b773b3164101aa36284a20
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/optimize.c
Log Message:
-----------
tcg: Fix out of range shift in deposit optimizations
By inspection, for a deposit(x, y, 0, 64), we'd have a shift of (1<<64)
and everything else falls apart. But we can reuse the existing deposit
logic to get this right.
Signed-off-by: Richard Henderson <address@hidden>
Commit: f6c6afc1d41bf53394df15f62b25f15e1de72614
https://github.com/qemu/qemu/commit/f6c6afc1d41bf53394df15f62b25f15e1de72614
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/aarch64/tcg-target.c
M tcg/arm/tcg-target.c
M tcg/i386/tcg-target.c
M tcg/ia64/tcg-target.c
M tcg/mips/tcg-target.c
M tcg/ppc/tcg-target.c
M tcg/ppc64/tcg-target.c
M tcg/s390/tcg-target.c
M tcg/sparc/tcg-target.c
M tcg/tcg.c
M tcg/tci/tcg-target.c
Log Message:
-----------
tcg: Add TCGType parameter to tcg_target_const_match
Most 64-bit targets need to be able to ignore the high bits
of a TCG_TYPE_I32 value.
Suggested-by: Stuart Brady <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Commit: 170bf9315b352ce56aafa9785eea441b326ed5b7
https://github.com/qemu/qemu/commit/170bf9315b352ce56aafa9785eea441b326ed5b7
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/aarch64/tcg-target.c
Log Message:
-----------
tcg-aarch64: Remove w constraint
Now redundant with the type parameter to tcg_target_const_match.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 1194dcba22a1dbd9fb797fa087bd8f8ab0cb377e
https://github.com/qemu/qemu/commit/1194dcba22a1dbd9fb797fa087bd8f8ab0cb377e
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/ppc64/tcg-target.c
Log Message:
-----------
tcg-ppc64: Use the type parameter to tcg_target_const_match
Signed-off-by: Richard Henderson <address@hidden>
Commit: 4b304cfae13e66d95de8bb67ce769881fc3a3f1b
https://github.com/qemu/qemu/commit/4b304cfae13e66d95de8bb67ce769881fc3a3f1b
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/sparc/tcg-target.c
Log Message:
-----------
tcg-sparc: Use the type parameter to tcg_target_const_match
Signed-off-by: Richard Henderson <address@hidden>
Commit: 671c835b7dc12bfb3907c6af38f74073fe8fade9
https://github.com/qemu/qemu/commit/671c835b7dc12bfb3907c6af38f74073fe8fade9
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/s390/tcg-target.c
Log Message:
-----------
tcg-s390: Remove W constraint
Now redundant with the type parameter to tcg_target_const_match.
Signed-off-by: Richard Henderson <address@hidden>
Commit: df9ebea53ebc1c98217743f56c30ae3a46031bb9
https://github.com/qemu/qemu/commit/df9ebea53ebc1c98217743f56c30ae3a46031bb9
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/arm/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/tcg.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Relax requirement for mulu2_i32 on 32-bit hosts
Instead require either mulu2_i32 or muluh_i32. The code in tcg-op.h
already supports looking for both. Previous incomplete conversion?
Signed-off-by: Richard Henderson <address@hidden>
Commit: f46fc4e6a953e78b283834f67bc338bd35d7d316
https://github.com/qemu/qemu/commit/f46fc4e6a953e78b283834f67bc338bd35d7d316
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/tcg-op.h
Log Message:
-----------
tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32
Rather than hard-coding use of mulu2_i32, allow muluh_i32.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 662deb908f72a0282c4c2fdb9f62f9f484c62e5b
https://github.com/qemu/qemu/commit/662deb908f72a0282c4c2fdb9f62f9f484c62e5b
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/tcg-op.h
Log Message:
-----------
tcg: Fix fallback from muls2_i64 to mulu2_i64
Brown Bag sez, don't put the fallback code into the wrong function.
Also, check for muluh_i64 and use tcg_gen_mulu2_i64 instead of raw ops.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 02eb19d0ec19ac8fb1de1116999184663763eaa0
https://github.com/qemu/qemu/commit/02eb19d0ec19ac8fb1de1116999184663763eaa0
Author: Richard Henderson <address@hidden>
Date: 2014-04-18 (Fri, 18 Apr 2014)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/mips/tcg-target.c
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/ppc64/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.h
M tcg/tcg-op.h
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Use HOST_WORDS_BIGENDIAN
Instead of rolling a local TCG_TARGET_WORDS_BIGENDIAN.
Signed-off-by: Richard Henderson <address@hidden>
Commit: ad600a4d49293f6b8eda7932f90e5aa5fa2021b0
https://github.com/qemu/qemu/commit/ad600a4d49293f6b8eda7932f90e5aa5fa2021b0
Author: Peter Maydell <address@hidden>
Date: 2014-04-24 (Thu, 24 Apr 2014)
Changed paths:
M tcg/README
M tcg/aarch64/tcg-target.c
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c
M tcg/i386/tcg-target.h
M tcg/ia64/tcg-target.c
M tcg/mips/tcg-target.c
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.c
M tcg/ppc/tcg-target.h
M tcg/ppc64/tcg-target.c
M tcg/ppc64/tcg-target.h
M tcg/s390/tcg-target.c
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.c
M tcg/sparc/tcg-target.h
M tcg/tcg-be-ldst.h
M tcg/tcg-op.h
M tcg/tcg.c
M tcg/tcg.h
M tcg/tci/tcg-target.c
M tcg/tci/tcg-target.h
M tci.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20140422' into staging
Pull tcg 2014-04-22
# gpg: Signature made Tue 22 Apr 2014 22:00:04 BST using RSA key ID 4DD0279B
# gpg: Can't check signature: public key not found
* remotes/rth/tags/tcg-next-20140422:
tcg: Use HOST_WORDS_BIGENDIAN
tcg: Fix fallback from muls2_i64 to mulu2_i64
tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32
tcg: Relax requirement for mulu2_i32 on 32-bit hosts
tcg-s390: Remove W constraint
tcg-sparc: Use the type parameter to tcg_target_const_match
tcg-ppc64: Use the type parameter to tcg_target_const_match
tcg-aarch64: Remove w constraint
tcg: Add TCGType parameter to tcg_target_const_match
tcg: Fix out of range shift in deposit optimizations
tci: Mask shift counts to avoid undefined behavior
tcg: Mask shift quantities while folding
tcg: Use "unspecified behavior" for shifts
tcg: Fix warning (1 bit signed bitfield entry) and replace int by bool
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/ba3627ec384d...ad600a4d4929
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