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[Qemu-commits] [COMMIT feeb3b6] Fix MIPS SC


From: Anthony Liguori
Subject: [Qemu-commits] [COMMIT feeb3b6] Fix MIPS SC
Date: Sun, 12 Jul 2009 12:29:38 -0000

From: Paul Brook <address@hidden>

Fix botched merge of op_ldst_sc calls to match actual implementation.
Thanks to Aurelien Jarno for diagnosing this.

Signed-off-by: Paul Brook <address@hidden>

diff --git a/target-mips/translate.c b/target-mips/translate.c
index cf467f8..cc8b329 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1174,13 +1174,13 @@ static void gen_st_cond (DisasContext *ctx, uint32_t 
opc, int rt,
 #if defined(TARGET_MIPS64)
     case OPC_SCD:
         save_cpu_state(ctx, 0);
-        op_ldst_scd(t0, t1, t0, ctx);
+        op_ldst_scd(t1, t0, rt, ctx);
         opn = "scd";
         break;
 #endif
     case OPC_SC:
         save_cpu_state(ctx, 0);
-        op_ldst_sc(t0, t1, t0, ctx);
+        op_ldst_sc(t1, t0, rt, ctx);
         opn = "sc";
         break;
     }




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