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[Qemu-block] [PATCH 3/8] hw/southbridge: Add the PIIX chipset to Kconfig
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-block] [PATCH 3/8] hw/southbridge: Add the PIIX chipset to Kconfig |
Date: |
Mon, 11 Mar 2019 00:53:46 +0100 |
The PIIX (Intel 82371FB) is a bridge between PCI <-> ISA.
It contains:
- IDE interface (PIO and burst transfers)
- one 82c54 timer (and speaker tone output)
- two 82c59 interrupts controllers
- two 8237 DMA controllers
- Power Management (programmable SMI)
- NMI
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
hw/ide/Kconfig | 1 +
hw/isa/Kconfig | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig
index ab47b6a7a3..1d997240c1 100644
--- a/hw/ide/Kconfig
+++ b/hw/ide/Kconfig
@@ -17,6 +17,7 @@ config IDE_ISA
config IDE_PIIX
bool
+ select IDE_ISA
select IDE_PCI
select IDE_QDEV
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index 57e09a0cb8..681e6f1bce 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -24,6 +24,19 @@ config PC87312
select FDC
select IDE_ISA
+config PIIX
+ bool
+ select PCI_PIIX
+ select IDE_PIIX
+ select I8254
+ select I8259
+ select PCSPK
+ select I8257
+ #select PM_PIIX
+ #select SMI_PIIX
+ #select NMI_PIIX
+ select ISA_BUS
+
config PIIX4
bool
# For historical reasons, SuperIO devices are created in the board
--
2.20.1
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