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Re: [Qemu-block] [Qemu-devel] [PATCH v5 06/11] esp: add pseudo-DMA as us


From: Laurent Vivier
Subject: Re: [Qemu-block] [Qemu-devel] [PATCH v5 06/11] esp: add pseudo-DMA as used by Macintosh
Date: Tue, 30 Oct 2018 21:08:05 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0

On 30/10/2018 11:09, Mark Cave-Ayland wrote:
> On 30/10/2018 06:47, Hervé Poussineau wrote:
> 
>> Le 29/10/2018 à 14:39, Mark Cave-Ayland a écrit :
>>> From: Laurent Vivier <address@hidden>
>>>
>>> Co-developed-by: Mark Cave-Ayland <address@hidden>
>>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>>> Signed-off-by: Laurent Vivier <address@hidden>
>>> ---
>>>   hw/scsi/esp.c         | 292 
>>> +++++++++++++++++++++++++++++++++++++++++++++-----
>>>   include/hw/scsi/esp.h |   7 ++
>>>   2 files changed, 270 insertions(+), 29 deletions(-)
>>>
>>
>> [...]
>>
>>>   @@ -409,6 +564,7 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
>>>               s->ti_size--;
>>>               s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
>>>           }
>>> +        esp_raise_irq(s);
>>>           if (s->ti_rptr == s->ti_wptr) {
>>>               s->ti_rptr = 0;
>>>               s->ti_wptr = 0;
>>
>> You're now raising irq (not drq) when reading registers. In my opinion, this 
>> deserves
>> its own patch with an explanation.

This line must be removed.

> Oooh good spot. Laurent, can you explain a bit more as to how the pseudo-DMA 
> is wired
> up for ESP?
> 

There is no DMA in Quadra 800, so the CPU reads/writes the data from the
PDMA register (offset 0x100, ESP_PDMA in hw/m68k/q800.c) and copies them
to/from the memory.

There is a nice assembly loop in the kernel to do that, see
linux/drivers/scsi/mac_esp.c:MAC_ESP_PDMA_LOOP().

The start of the transfer is triggered by the DREQ interrupt (see linux
mac_esp_send_pdma_cmd()), the CPU polls on the IRQ flag to start the
transfer after a SCSI command has been sent (in Quadra 800 it goes
through the VIA2, the via2-irq line and the vIFR register)

The Macintosh hardware includes hardware handshaking to prevent the CPU
from reading invalid data or writing data faster than the peripheral
device can accept it.

This is the "blind mode", and from the doc:
"Approximate maximum SCSI transfer rates within a blocks are 1.4 MB per
second for blind transfers in the Macintosh II"

Some references can be found in:
  Apple Macintosh Family Hardware Reference, ISBN 0-201-19255-1
  Guide to the Macintosh Family Hardware, ISBN-0-201-52405-8

Thanks,
Laurent



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