[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-block] [PATCH v2 08/14] port92: handle A20 IRQ as GPIO
From: |
Efimov Vasily |
Subject: |
[Qemu-block] [PATCH v2 08/14] port92: handle A20 IRQ as GPIO |
Date: |
Wed, 22 Jun 2016 15:24:52 +0300 |
The port92 device has outgouing IRQ line A20. Currently the IRQ is referenced
by a pointer which normally is set during machine initialization. The
pointer is never changed at runtime. Hence, common GPIO model can be applied
to A20 IRQ line. Note that checking for IRQ to be connected as in
previous version of code is not required qemu_set_irq will do it.
Signed-off-by: Efimov Vasily <address@hidden>
---
hw/i386/pc.c | 10 +++++-----
include/hw/i386/pc.h | 2 ++
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 7198ed5..2cd89a9 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -505,7 +505,7 @@ typedef struct Port92State {
MemoryRegion io;
uint8_t outport;
- qemu_irq *a20_out;
+ qemu_irq a20_out;
} Port92State;
static void port92_write(void *opaque, hwaddr addr, uint64_t val,
@@ -516,7 +516,7 @@ static void port92_write(void *opaque, hwaddr addr,
uint64_t val,
DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
s->outport = val;
- qemu_set_irq(*s->a20_out, (val >> 1) & 1);
+ qemu_set_irq(s->a20_out, (val >> 1) & 1);
if ((val & 1) && !(oldval & 1)) {
qemu_system_reset_request();
}
@@ -535,9 +535,7 @@ static uint64_t port92_read(void *opaque, hwaddr addr,
static void port92_init(ISADevice *dev, qemu_irq *a20_out)
{
- Port92State *s = PORT92(dev);
-
- s->a20_out = a20_out;
+ qdev_connect_gpio_out_named(DEVICE(dev), PORT92_A20_LINE, 0, *a20_out);
}
static const VMStateDescription vmstate_port92_isa = {
@@ -574,6 +572,8 @@ static void port92_initfn(Object *obj)
memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
s->outport = 0;
+
+ qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, PORT92_A20_LINE, 1);
}
static void port92_realizefn(DeviceState *dev, Error **errp)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index d615727..6a991d9 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -275,6 +275,8 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0);
#define FW_CFG_IO_BASE 0x510
+#define PORT92_A20_LINE "a20"
+
/* acpi_piix.c */
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
--
2.7.4
- [Qemu-block] [PATCH v2 02/14] pcspk: convert "pit" property type from ptr to link, (continued)
- [Qemu-block] [PATCH v2 02/14] pcspk: convert "pit" property type from ptr to link, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 04/14] pflash: make TYPE_CFI_PFLASH0{1, 2} macros public, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 11/14] ICH9 LPC: move call of isa_bus_irqs to 'realize' method, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 07/14] pckbd: handle A20 IRQ as GPIO, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 13/14] MC146818 RTC: add GPIO access to output IRQ, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 14/14] ICH9 LPC: configure PCI IRQs routing internally, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 10/14] ICH9 LPC: handle GSI as qdev GPIO, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 09/14] ICH9 SMB: make TYPE_ICH9_SMB_DEVICE macro public, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 05/14] Q35: implement property interfece to several parameters, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 06/14] pc_q35: configure Q35 instance using properties, Efimov Vasily, 2016/06/22
- [Qemu-block] [PATCH v2 08/14] port92: handle A20 IRQ as GPIO,
Efimov Vasily <=
- [Qemu-block] [PATCH v2 12/14] isa: introduce wrapper isa_connect_gpio_out, Efimov Vasily, 2016/06/22
- Re: [Qemu-block] [PATCH v2 00/14] Make Q35 devices closer to Qemu object model., Paolo Bonzini, 2016/06/22