[PATCH 0/2] target/arm: Implement Cortex Neoverse-V1

[Peter Maydell]

This patchset implements the Cortex Neoverse-V1 CPU type, as a
representative Armv8.3 (+ some extras from 8.4) CPU matching real
hardware.  The main thing we were waiting for to be able to define
this was FEAT_LSE2, and that is now supported.

There are a few things the real hardware implements that QEMU does
not yet, which patch 1 ensures we don't advertise to the guest:

  * FEAT_TRF (Self-hosted Trace Extension)
  * Trace Macrocell system register access
  * Memory mapped trace
  * FEAT_AMU (Activity Monitors Extension)
  * FEAT_MPAM (Memory Partitioning and Monitoring Extension)
  * FEAT_NV (Nested Virtualization)

Most of these, like FEAT_SPE which we were already suppressing, are
"introspection/trace" type features which QEMU is unlikely to ever
implement.  The odd-one-out here is FEAT_NV -- we could implement
that and at some point we probably will.
                
Patch 2 then implements the CPU itself.

thanks
-- PMM

Peter Maydell (2):
  target/arm: Suppress more TCG unimplemented features in ID registers
  target/arm: Define neoverse-v1

 docs/system/arm/virt.rst |   1 +
 hw/arm/sbsa-ref.c        |   1 +
 hw/arm/virt.c            |   1 +
 target/arm/cpu.c         |  33 ++++++++--
 target/arm/tcg/cpu64.c   | 128 +++++++++++++++++++++++++++++++++++++++
 5 files changed, 160 insertions(+), 4 deletions(-)

-- 
2.34.1