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[Qemu-arm] [PATCH 05/19] hw/arm/aspeed: Add RTC to SoC
From: |
Cédric Le Goater |
Subject: |
[Qemu-arm] [PATCH 05/19] hw/arm/aspeed: Add RTC to SoC |
Date: |
Sat, 25 May 2019 17:12:27 +0200 |
From: Joel Stanley <address@hidden>
All systems have an RTC.
The IRQ is hooked up but the model does not use it at this stage. There
is no guest code that uses it, so this limitation is acceptable.
Signed-off-by: Joel Stanley <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed_soc.c | 13 +++++++++++++
2 files changed, 15 insertions(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 88b901d5dfa9..fa0ba957a611 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -16,6 +16,7 @@
#include "hw/misc/aspeed_scu.h"
#include "hw/misc/aspeed_sdmc.h"
#include "hw/timer/aspeed_timer.h"
+#include "hw/timer/aspeed_rtc.h"
#include "hw/i2c/aspeed_i2c.h"
#include "hw/ssi/aspeed_smc.h"
#include "hw/watchdog/wdt_aspeed.h"
@@ -32,6 +33,7 @@ typedef struct AspeedSoCState {
ARMCPU cpu;
MemoryRegion sram;
AspeedVICState vic;
+ AspeedRtcState rtc;
AspeedTimerCtrlState timerctrl;
AspeedI2CState i2c;
AspeedSCUState scu;
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 4b705afd096a..d1dc8f03f35c 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -189,6 +189,9 @@ static void aspeed_soc_init(Object *obj)
sysbus_init_child_obj(obj, "vic", OBJECT(&s->vic), sizeof(s->vic),
TYPE_ASPEED_VIC);
+ sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc),
+ TYPE_ASPEED_RTC);
+
sysbus_init_child_obj(obj, "timerctrl", OBJECT(&s->timerctrl),
sizeof(s->timerctrl), TYPE_ASPEED_TIMER);
object_property_add_const_link(OBJECT(&s->timerctrl), "scu",
@@ -275,6 +278,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error
**errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1,
qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
+ /* RTC */
+ object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->info->memmap[ASPEED_RTC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
+ aspeed_soc_get_irq(s, ASPEED_RTC));
+
/* Timer */
object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err);
if (err) {
--
2.20.1
- [Qemu-arm] [PATCH 00/19] aspeed: machine extensions and fixes, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 01/19] hw/arm/aspeed: Use object_initialize_child for correct ref. counting, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 02/19] aspeed: add a per SoC mapping for the interrupt space, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 03/19] aspeed: add a per SoC mapping for the memory space, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 05/19] hw/arm/aspeed: Add RTC to SoC,
Cédric Le Goater <=
- [Qemu-arm] [PATCH 04/19] hw: timer: Add ASPEED RTC device, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 06/19] aspeed: introduce a configurable number of CPU per machine, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 07/19] aspeed: add support for multiple NICs, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 08/19] aspeed/timer: Fix behaviour running Linux, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 09/19] aspeed/timer: Status register contains reload for stopped timer, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 10/19] aspeed/timer: Fix match calculations, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 11/19] aspeed/timer: Provide back-pressure information for short periods, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 19/19] aspeed/smc: Calculate checksum on normal DMA, Cédric Le Goater, 2019/05/25