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Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug


From: Igor Mammedov
Subject: Re: [Qemu-arm] [PATCH] hw/arm/acpi: enable SHPC native hot plug
Date: Fri, 1 Mar 2019 15:33:11 +0100

On Fri, 1 Mar 2019 09:12:33 -0500
"Michael S. Tsirkin" <address@hidden> wrote:

> On Fri, Mar 01, 2019 at 10:04:38PM +0800, Heyi Guo wrote:
> > 
> > 
> > On 2019/3/1 21:47, Michael S. Tsirkin wrote:  
> > > On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:  
> > > > After the introduction of generic PCIe root port and PCIe-PCI bridge,
> > > > we will also have SHPC controller on ARM, so just enalbe SHPC native
> > > > hot plug.
> > > > 
> > > > Cc: Shannon Zhao <address@hidden>
> > > > Cc: Peter Maydell <address@hidden>
> > > > Cc: "Michael S. Tsirkin" <address@hidden>
> > > > Cc: Igor Mammedov <address@hidden>
> > > > Signed-off-by: Heyi Guo <address@hidden>
> > > > Signed-off-by: Heyi Guo <address@hidden>  
> > > 
> > > So when OS enables SHPC, should we block ACPI hotplug events?  
> > I supposed we don't support ACPI hotplug events on ARM virt; do we have any 
> > currently?
> > 
> > Thanks,
> > Heyi  
> 
> Oh I didn't realise. That explains it sorry about the noise.
And I thought we did not support them on PCIe completely (I mean q35/ich9).
(Or did I miss something)?

> 
> > >   
> > > > ---
> > > >   hw/arm/virt-acpi-build.c | 7 ++++++-
> > > >   1 file changed, 6 insertions(+), 1 deletion(-)
> > > > 
> > > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > > index 04b62c7..7849ec5 100644
> > > > --- a/hw/arm/virt-acpi-build.c
> > > > +++ b/hw/arm/virt-acpi-build.c
> > > > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const 
> > > > MemMapEntry *memmap,
> > > >           aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> > > >       aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> > > >       aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> > > > -    aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), 
> > > > aml_int(0x1D), NULL),
> > > > +
> > > > +    /*
> > > > +     * Allow OS control for all 5 features:
> > > > +     * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> > > > +     */
> > > > +    aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), 
> > > > aml_int(0x1F), NULL),
> > > >                                   aml_name("CTRL")));
> > > >       ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> > > > -- 
> > > > 1.8.3.1  
> > > .
> > >   
> >   




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