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[Qemu-arm] [PATCH v6 00/14] More fully implement ARM PMUv3
From: |
Aaron Lindsay |
Subject: |
[Qemu-arm] [PATCH v6 00/14] More fully implement ARM PMUv3 |
Date: |
Wed, 10 Oct 2018 16:37:21 -0400 |
The ARM PMU implementation currently contains a basic cycle counter, but
it is often useful to gather counts of other events, filter them based
on execution mode, and/or be notified on counter overflow. These patches
flesh out the implementations of various PMU registers including
PM[X]EVCNTR and PM[X]EVTYPER, add a struct definition to represent
arbitrary counter types, implement mode filtering, send interrupts on
counter overflow, and add instruction, cycle, and software increment
events.
Since v5 [1] I have:
* Taken a first pass at addressing migration
* Restructured the list of supported events, and ensured they're all
initialized
* Fixed aliasing for PMOVSSET
* Added ARM_CP_IO for PMINTENCLR and PMINTENCLR_EL1
* Addressed a few non-code issues (comment style, patch staging,
spelling, etc.)
[1] - https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg06830.html
Aaron Lindsay (14):
target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly
doing IO
target/arm: Mask PMOVSR writes based on supported counters
migration: Add post_save function to VMStateDescription
target/arm: Swap PMU values before/after migrations
target/arm: Reorganize PMCCNTR accesses
target/arm: Filter cycle counter based on PMCCFILTR_EL0
target/arm: Allow AArch32 access for PMCCFILTR
target/arm: Implement PMOVSSET
target/arm: Add array for supported PMU events, generate PMCEID[01]
target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
target/arm: PMU: Add instruction and cycle events
target/arm: PMU: Set PMCR.N to 4
target/arm: Implement PMSWINC
target/arm: Send interrupts on PMU counter overflow
docs/devel/migration.rst | 9 +-
include/migration/vmstate.h | 1 +
migration/vmstate.c | 10 +-
target/arm/cpu.c | 28 +-
target/arm/cpu.h | 68 +++-
target/arm/cpu64.c | 2 -
target/arm/helper.c | 781 ++++++++++++++++++++++++++++++++----
target/arm/machine.c | 19 +
8 files changed, 817 insertions(+), 101 deletions(-)
--
2.19.1
- [Qemu-arm] [PATCH v6 00/14] More fully implement ARM PMUv3,
Aaron Lindsay <=
- [Qemu-arm] [PATCH v6 07/14] target/arm: Allow AArch32 access for PMCCFILTR, Aaron Lindsay, 2018/10/10
- [Qemu-arm] [PATCH v6 01/14] target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO, Aaron Lindsay, 2018/10/10
- [Qemu-arm] [PATCH v6 02/14] target/arm: Mask PMOVSR writes based on supported counters, Aaron Lindsay, 2018/10/10
- [Qemu-arm] [PATCH v6 04/14] target/arm: Swap PMU values before/after migrations, Aaron Lindsay, 2018/10/10
- [Qemu-arm] [PATCH v6 08/14] target/arm: Implement PMOVSSET, Aaron Lindsay, 2018/10/10