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[Qemu-arm] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers
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From: |
Joel Stanley |
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Subject: |
[Qemu-arm] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers |
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Date: |
Tue, 7 Aug 2018 17:27:51 +0930 |
The SDMC on the ast2500 has 170 registers.
Signed-off-by: Joel Stanley <address@hidden>
---
include/hw/misc/aspeed_sdmc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
index 551c8afdf4be..682f0f5d56dc 100644
--- a/include/hw/misc/aspeed_sdmc.h
+++ b/include/hw/misc/aspeed_sdmc.h
@@ -14,7 +14,7 @@
#define TYPE_ASPEED_SDMC "aspeed.sdmc"
#define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC)
-#define ASPEED_SDMC_NR_REGS (0x8 >> 2)
+#define ASPEED_SDMC_NR_REGS (0x174 >> 2)
typedef struct AspeedSDMCState {
/*< private >*/
--
2.17.1
- [Qemu-arm] [PATCH 0/7] arm: aspeed: Extend SDRAM controller, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 1/7] aspeed_sdmc: Extend number of valid registers,
Joel Stanley <=
- [Qemu-arm] [PATCH 2/7] aspeed_sdmc: Fix saved values, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 3/7] aspeed_sdmc: Set 'cache initial sequence' always true, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 4/7] aspeed_sdmc: Init status alwlays idle, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 5/7] aspeed_sdmc: Handle ECC training, Joel Stanley, 2018/08/07
- [Qemu-arm] [PATCH 6/7] aspeed: add a max_ram_size property to the memory controller, Joel Stanley, 2018/08/07