Re: [Qemu-arm] [RFC 6/8] arm: Add UICR/FICR handling to NRF51 SOC

[Stefan Hajnoczi]

On Wed, Jun 27, 2018 at 09:33:49AM +0200, Steffen Görtz wrote:
> This patch maps preallocated user/factory information
> configuration registers to the NRF51 SOC.
> See NRF51 reference manual section 7 and 8.
> 
> Signed-off-by: Steffen Görtz <address@hidden>
> ---
>  hw/arm/nrf51_soc.c         | 174 ++++++++++++++++++++++++++++++-------
>  include/hw/arm/nrf51_soc.h |   5 +-
>  2 files changed, 145 insertions(+), 34 deletions(-)
> 
> diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
> index e93699a4b0..82e4c2d833 100644
> --- a/hw/arm/nrf51_soc.c
> +++ b/hw/arm/nrf51_soc.c
> @@ -19,7 +19,6 @@
>  #include "sysemu/sysemu.h"
>  #include "qemu/log.h"
>  #include "cpu.h"
> -#include "crypto/random.h"
>  
>  #include "hw/arm/nrf51_soc.h"
>  
> @@ -29,6 +28,9 @@
>  #define FICR_BASE       0x10000000
>  #define FICR_SIZE       0x100
>  
> +#define UICR_BASE       0x10001000
> +#define UICR_SIZE       0x100

This definition is duplicated in your NVMC patch.  Please put it in the
nrf51_soc.h header file.

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