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[Qemu-arm] [PATCH 08/19] target/arm: Add Cortex-M33
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH 08/19] target/arm: Add Cortex-M33 |
Date: |
Tue, 20 Feb 2018 18:03:14 +0000 |
Add a Cortex-M33 definition. The M33 is an M profile CPU
which implements the ARM v8M architecture, including the
M profile Security Extension.
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 34b5a4a00b..897003a186 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1205,6 +1205,35 @@ static void cortex_m4_initfn(Object *obj)
cpu->id_isar5 = 0x00000000;
}
+static void cortex_m33_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ set_feature(&cpu->env, ARM_FEATURE_V8);
+ set_feature(&cpu->env, ARM_FEATURE_M);
+ set_feature(&cpu->env, ARM_FEATURE_M_SECURITY);
+ set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
+ cpu->midr = 0x410fd213; /* r0p3 */
+ cpu->pmsav7_dregion = 16;
+ cpu->sau_sregion = 8;
+ cpu->id_pfr0 = 0x00000030;
+ cpu->id_pfr1 = 0x00000210;
+ cpu->id_dfr0 = 0x00200000;
+ cpu->id_afr0 = 0x00000000;
+ cpu->id_mmfr0 = 0x00101F40;
+ cpu->id_mmfr1 = 0x00000000;
+ cpu->id_mmfr2 = 0x01000000;
+ cpu->id_mmfr3 = 0x00000000;
+ cpu->id_isar0 = 0x01101110;
+ cpu->id_isar1 = 0x02212000;
+ cpu->id_isar2 = 0x20232232;
+ cpu->id_isar3 = 0x01111131;
+ cpu->id_isar4 = 0x01310132;
+ cpu->id_isar5 = 0x00000000;
+ cpu->clidr = 0x00000000;
+ cpu->ctr = 0x8000c000;
+}
+
static void arm_v7m_class_init(ObjectClass *oc, void *data)
{
CPUClass *cc = CPU_CLASS(oc);
@@ -1696,6 +1725,8 @@ static const ARMCPUInfo arm_cpus[] = {
.class_init = arm_v7m_class_init },
{ .name = "cortex-m4", .initfn = cortex_m4_initfn,
.class_init = arm_v7m_class_init },
+ { .name = "cortex-m33", .initfn = cortex_m33_initfn,
+ .class_init = arm_v7m_class_init },
{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
--
2.16.1
- Re: [Qemu-arm] [Qemu-devel] [PATCH 15/19] hw/misc/iotkit-secctl: Arm IoT Kit security controller initial skeleton, (continued)
- [Qemu-arm] [PATCH 04/19] target/arm: Define an IDAU interface, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 16/19] hw/misc/iotkit-secctl: Add handling for PPCs, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 05/19] armv7m: Forward idau property to CPU object, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 19/19] mps2-an505: New board model: MPS2 with AN505 Cortex-M33 FPGA image, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 08/19] target/arm: Add Cortex-M33,
Peter Maydell <=
- [Qemu-arm] [PATCH 07/19] armv7m: Forward init-svtor property to CPU object, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 06/19] target/arm: Define init-svtor property for the reset secure VTOR value, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 03/19] hw/arm/armv7m: Honour CPU's address space for image loads, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 18/19] hw/arm/iotkit: Model Arm IOT Kit, Peter Maydell, 2018/02/20
- [Qemu-arm] [PATCH 02/19] hw/arm/boot: Honour CPU's address space for image loads, Peter Maydell, 2018/02/20