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[Qemu-arm] [PATCH 3/4] hw/intc/arm_gic: Fix group priority computation f
From: |
luc . michel |
Subject: |
[Qemu-arm] [PATCH 3/4] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs |
Date: |
Fri, 19 Jan 2018 15:57:55 +0100 |
From: Luc MICHEL <address@hidden>
When determining the group priority of a group 1 IRQ, if C_CTRL.CBPR is
0, the non-secure BPR value is used. However, this value must be
incremented by one so that it matches the secure world number of
implemented priority bits (NS world has one less priority bit compared
to the Secure world).
Signed-off-by: Luc MICHEL <address@hidden>
---
hw/intc/arm_gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 713de3084f..d0a41a89ae 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -256,7 +256,7 @@ static int gic_get_group_priority(GICState *s, int cpu, int
irq)
if (gic_has_groups(s) &&
!(s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) &&
GIC_TEST_GROUP(irq, (1 << cpu))) {
- bpr = s->abpr[cpu];
+ bpr = s->abpr[cpu] - 1;
} else {
bpr = s->bpr[cpu];
}
--
2.16.0