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[Qemu-arm] [PATCH v2 18/20] sdhci: add a check_capab_baseclock() qtest
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-arm] [PATCH v2 18/20] sdhci: add a check_capab_baseclock() qtest |
Date: |
Fri, 15 Dec 2017 00:15:45 -0300 |
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
tests/sdhci-test.c | 24 ++++++++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/tests/sdhci-test.c b/tests/sdhci-test.c
index 01373a69df..966bd00499 100644
--- a/tests/sdhci-test.c
+++ b/tests/sdhci-test.c
@@ -7,9 +7,11 @@
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
+#include "hw/registerfields.h"
#include "libqtest.h"
#define SDHC_CAPAB 0x40
+FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); /* since v2 */
#define SDHC_HCVER 0xFE
static const struct sdhci_t {
@@ -18,16 +20,17 @@ static const struct sdhci_t {
struct {
uintptr_t addr;
uint8_t version;
+ uint8_t baseclock;
} sdhci;
} models[] = {
{ "arm", "smdkc210",
- {0x12510000, 2} },
+ {0x12510000, 2, 0} },
{ "arm", "sabrelite",
- {0x02190000, 3} },
+ {0x02190000, 3, 0} },
{ "arm", "raspi2", /* bcm2835 */
- {0x3f300000, 3} },
+ {0x3f300000, 3, 52} },
{ "arm", "xilinx-zynq-a9", /* exynos4210 */
- {0xe0100000, 3} },
+ {0xe0100000, 3, 0} },
};
static uint32_t sdhci_readl(uintptr_t base, uint32_t reg_addr)
@@ -75,6 +78,18 @@ static void check_capab_readonly(uintptr_t addr)
g_assert_cmpuint(capab1, ==, capab0);
}
+static void check_capab_baseclock(uintptr_t addr, uint8_t expected_freq)
+{
+ uint64_t capab, capab_freq;
+
+ if (!expected_freq) {
+ return;
+ }
+ capab = sdhci_readq(addr, SDHC_CAPAB);
+ capab_freq = FIELD_EX64(capab, SDHC_CAPAB, BASECLKFREQ);
+ g_assert_cmpuint(capab_freq, ==, expected_freq);
+}
+
static void test_machine(const void *data)
{
const struct sdhci_t *test = data;
@@ -83,6 +98,7 @@ static void test_machine(const void *data)
check_specs_version(test->sdhci.addr, test->sdhci.version);
check_capab_readonly(test->sdhci.addr);
+ check_capab_baseclock(test->sdhci.addr, test->sdhci.baseclock);
qtest_quit(global_qtest);
}
--
2.15.1
- [Qemu-arm] [PATCH v2 13/20] sdhci: Implement write method of ACMD12ERRSTS register, (continued)
- [Qemu-arm] [PATCH v2 13/20] sdhci: Implement write method of ACMD12ERRSTS register, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 12/20] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 14/20] sdhci: add a "sd-spec-version" property, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 15/20] sdhci: some ARM boards do support SD_HOST_SPECv3_VERS, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 16/20] sdhci: add qtest to check the SD Spec version, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 17/20] sdhci: add check_capab_readonly() qtest, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 18/20] sdhci: add a check_capab_baseclock() qtest,
Philippe Mathieu-Daudé <=
- [Qemu-arm] [PATCH v2 19/20] sdhci: add a check_capab_sdma() qtest, Philippe Mathieu-Daudé, 2017/12/14
- [Qemu-arm] [PATCH v2 20/20] sdhci: add a check_capab_v3() qtest, Philippe Mathieu-Daudé, 2017/12/14