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Re: [Qemu-arm] [PATCH v11 23/24] hw/misc/imx6_src: defer clearing of SRC
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v11 23/24] hw/misc/imx6_src: defer clearing of SRC_SCR reset bits |
Date: |
Fri, 10 Feb 2017 15:34:17 +0000 |
On 10 February 2017 at 15:19, Alex Bennée <address@hidden> wrote:
> Peter Maydell <address@hidden> writes:
>> I guess a malloc-and-free is OK since the guest isn't going to be
>> bouncing CPUs through reset very often, though it's a bit ugly to
>> see in device code.
>
> Previous patches had expanded the run_on_cpu code to have things like
> CPUState and a single field to avoid malloc where we can. However I need
> the IMX6SRCState and I don't know if I can get that in the work
> function. Will there only ever be one on the system?
In practice there will be only one but I don't think we should
rely on that. malloc/free is probably better than overly
convoluted code at this point.
thanks
-- PMM