|
From: | Claudio Fontana |
Subject: | Re: [Qemu-arm] [RFC v2 PATCH 03/13] tcg/aarch64: Add support for fence |
Date: | Tue, 31 May 2016 20:59:35 +0200 |
Cc: Claudio Fontana <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Signed-off-by: Pranith Kumar <address@hidden>
---
tcg/aarch64/tcg-target.inc.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 08efdf4..c361a5c 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -360,6 +360,9 @@ typedef enum {
I3510_EOR = 0x4a000000,
I3510_EON = 0x4a200000,
I3510_ANDS = 0x6a000000,
+
+ /* System instructions. */
+ DMB_ISH = 0xd5033bbf,
} AArch64Insn;
static inline uint32_t tcg_in32(TCGContext *s)
@@ -1625,6 +1628,9 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_insn(s, 3508, SMULH, TCG_TYPE_I64, a0, a1, a2);
break;
+ case INDEX_op_mb:
+ tcg_out32(s, DMB_ISH);
+ break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
@@ -1749,6 +1755,7 @@ static const TCGTargetOpDef aarch64_op_defs[] = {
{ INDEX_op_muluh_i64, { "r", "r", "r" } },
{ INDEX_op_mulsh_i64, { "r", "r", "r" } },
+ { INDEX_op_mb, { "r" } },
{ -1 },
};
--
2.8.3
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