Nicolas Pinault wrote:
John Keil a écrit :
Unfortunately, TI's compiler does not support any kind of structure packing
for their C6000 DSP's (no #pragma pack, or anything similar). This is
always a bit of a headache when interfacing to other devices, but
fortunately hasn't caused us too many problems with lwIP. In fact, the
dns.c file is one of the few we have to modify (there are also overlays of
32-bit structures made on non-32-bit aligned arrays in dns.c, which don't
work for us).
I'm surprised you don't have trouble elsewhere in lwIP since structure
packing is used extensively in core structures!
The problem with these DSP is that whatever the size of the operand, (8,
16 or 32 bits), the compiler allways use 32bit "accesses". This is due
to the fact that these DSPs can manipulate only 32bit registers. Memory
accesses are also only 32bit accesses.
Despite the optimal width of memory accesses the C6x does support a load
byte (ldb) instruction (very possibly implemented in silicon as a 32-bit
read with a mask and shift to cope with the memory access constraints).
Either way, it doesn't prevent a compiler supporting a packed structure and
knowing it will have to assume it and all its members are potentially
unaligned.
Jifl
I worked with such a DSP about 10 years ago. At that time TI did not
managed anything regarding this problem.