Need some information related setting make variables during run-time depending on the target

[Sandeep K S]

Hello Make Experts,

 I need some information on Makefiles with respect to setting some  make variables during run time depending on the target.

For eg:

I have two targets A and B. For Target A, I need to set a variable FLAG as '-DFLAG_A', and for target B, I need to set the variable FLAG as '-DFLAG_B'. This FLAG variable is used in the compilation which declares two macros (FLAG_A and FLAG_B) for the C file to use.

I am not able to figure out how I can set the FLAG variable to FLAG_A for target A, and FLAG_B for target B.

I tried the following two options, but was not able to successfully set the FLAG variable depending on the target.

Option 1:
makefile:

<<<<< Here $@ represent 'A' or 'B' depending on the target provided with the make command.>>>>>
ifeq ($@, "A")   
FLAG=-DFLAG_A
else
FLAG=-DFLAG_B
endif

A: x.o y.o z.o $FLAG

B: x.o y.o g.o $FLAG

Option 2:
Makefile:

A: x.o y.o z.o $FLAG
    FLAG=-DFLAG_A

B: x.o y.o g.o $FLAG
    FLAG=-DFLAG_B


However, both these options did not work for me.

Please provide some inputs on how I can modify the FLAG variable at run time depending on whether I execute "make A" or I execute "make B". Can I do this in a single makefile, or do I need to have mutliple makefiles (probably one makefile in one directory and another makefile in another directory), and hardcode the FLAG value directly in the makefile corresponding to the target being compiled.

Thanks in advance for your help.

Regards
Sandeep