Re: Recursive Make and -t

[Paul D. Smith]

%% Ken Smith <address@hidden> writes:

  ks> The above three invocations are all invoking a submake using the
  ks> builtin $(MAKE) variable.  The target test1 is using it
  ks> indirectly.  This indirection breaks the special treatment of the
  ks> variable when using -t which I would have suspected would be
  ks> preserved.  Is this intended?  If so, why?

"Intended" is probably the wrong word.  A better word would be
"unavoidable".

When make checks to see if a command string contains a reference to
$(MAKE), it just looks for that string using a simple string search.

If it's not found, then make expands the command string.  Once the
command string is expanded, any embedded reference to $(MAKE) is gone
(it's been expanded), so make can no longer look to see if it existed.


There's no way make can "interrupt" the expansion of a variable at every
step (remember you don't know how deep the reference might be buried) to
check the results of that step and see if $(MAKE) was contained there.

The latest version of the GNU make manual has this info in the "How the
'MAKE' Variable Works" section:

>   [...]  This special feature
> is only enabled if the 'MAKE' variable appears directly in the
> command script: it does not apply if the 'MAKE' variable is
> referenced through expansion of another variable.  In the latter case
> you must use the '+' token to get these special effects.

-- 
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 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist