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[Guile-commits] 322/437: Add assertion to check for register allocation


From: Andy Wingo
Subject: [Guile-commits] 322/437: Add assertion to check for register allocation leaks
Date: Mon, 2 Jul 2018 05:14:47 -0400 (EDT)

wingo pushed a commit to branch lightning
in repository guile.

commit 44519452d9b7f7bc46e2fb5154df438ee316f96c
Author: pcpa <address@hidden>
Date:   Sun Oct 26 18:25:41 2014 -0200

    Add assertion to check for register allocation leaks
    
        * lib/jit_aarch64.c, lib/jit_alpha.c, lib/jit_arm.c,
        lib/jit_hppa.c, lib/jit_ia64.c, lib/jit_mips.c, lib/jit_ppc.c,
        lib/jit_s390x.c, lib/jit_sparc.c, lib/jit_x86.c: Add an
        assertion to all code generation "drivers" to ensure
        _jitc->regarg is empty or in an expected state, after
        translation of a lightning instruction to native code.
        This change was a brute force test to find out other cases
        of a temporary not being release (like was happening with
        _bmsi and _bmci on x86), but no other case was found,
        after running make check, with assertions enabled, on all
        backends.
---
 ChangeLog         | 14 ++++++++++++++
 lib/jit_aarch64.c |  1 +
 lib/jit_alpha.c   |  1 +
 lib/jit_arm.c     |  1 +
 lib/jit_hppa.c    |  1 +
 lib/jit_ia64.c    |  6 ++++++
 lib/jit_mips.c    |  1 +
 lib/jit_ppc.c     |  1 +
 lib/jit_s390x.c   |  1 +
 lib/jit_sparc.c   |  1 +
 lib/jit_x86.c     |  1 +
 11 files changed, 29 insertions(+)

diff --git a/ChangeLog b/ChangeLog
index 3b4b0fc..ef39be4 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,19 @@
 2014-10-26 Paulo Andrade <address@hidden>
 
+       * lib/jit_aarch64.c, lib/jit_alpha.c, lib/jit_arm.c,
+       lib/jit_hppa.c, lib/jit_ia64.c, lib/jit_mips.c, lib/jit_ppc.c,
+       lib/jit_s390x.c, lib/jit_sparc.c, lib/jit_x86.c: Add an
+       assertion to all code generation "drivers" to ensure
+       _jitc->regarg is empty or in an expected state, after
+       translation of a lightning instruction to native code.
+       This change was a brute force test to find out other cases
+       of a temporary not being release (like was happening with
+       _bmsi and _bmci on x86), but no other case was found,
+       after running make check, with assertions enabled, on all
+       backends.
+
+2014-10-26 Paulo Andrade <address@hidden>
+
        * lib/jit_x86-cpu.c: Correct a register allocation leak in
        _bmsi and _bmci.
 
diff --git a/lib/jit_aarch64.c b/lib/jit_aarch64.c
index 52d5c4f..a8673ea 100644
--- a/lib/jit_aarch64.c
+++ b/lib/jit_aarch64.c
@@ -1150,6 +1150,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_alpha.c b/lib/jit_alpha.c
index 6fbdf6d..91e2aa1 100644
--- a/lib/jit_alpha.c
+++ b/lib/jit_alpha.c
@@ -1191,6 +1191,7 @@ _emit_code(jit_state_t *_jit)
            }
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == jit_carry == _NOREG ? 0 : (1 << jit_carry));
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_arm.c b/lib/jit_arm.c
index ed086dd..1790225 100644
--- a/lib/jit_arm.c
+++ b/lib/jit_arm.c
@@ -1526,6 +1526,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
 
diff --git a/lib/jit_hppa.c b/lib/jit_hppa.c
index bc277bc..d3f79d7 100644
--- a/lib/jit_hppa.c
+++ b/lib/jit_hppa.c
@@ -1139,6 +1139,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_ia64.c b/lib/jit_ia64.c
index e3c6554..6aa4562 100644
--- a/lib/jit_ia64.c
+++ b/lib/jit_ia64.c
@@ -1356,6 +1356,12 @@ _emit_code(jit_state_t *_jit)
        sync();
 #endif
        jit_regarg_clr(node, value);
+       if (jit_carry == _NOREG)
+           assert(jit_regset_cmp_ui(&_jitc->regarg, 0) == 0);
+       else {
+           assert(jit_regset_scan1(&_jitc->regarg, 0) == jit_carry);
+           assert(jit_regset_scan1(&_jitc->regarg, jit_carry + 1) == 
ULONG_MAX);
+       }
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_mips.c b/lib/jit_mips.c
index aed730c..71822a0 100644
--- a/lib/jit_mips.c
+++ b/lib/jit_mips.c
@@ -1467,6 +1467,7 @@ _emit_code(jit_state_t *_jit)
            }
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == jit_carry == _NOREG ? 0 : (1 << jit_carry));
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_ppc.c b/lib/jit_ppc.c
index 8ef6119..2bd92cb 100644
--- a/lib/jit_ppc.c
+++ b/lib/jit_ppc.c
@@ -1351,6 +1351,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_s390x.c b/lib/jit_s390x.c
index 460d793..98863e7 100644
--- a/lib/jit_s390x.c
+++ b/lib/jit_s390x.c
@@ -1135,6 +1135,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_sparc.c b/lib/jit_sparc.c
index dc1557c..65b4f3f 100644
--- a/lib/jit_sparc.c
+++ b/lib/jit_sparc.c
@@ -1132,6 +1132,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }
diff --git a/lib/jit_x86.c b/lib/jit_x86.c
index 6f55ebd..c2158d6 100644
--- a/lib/jit_x86.c
+++ b/lib/jit_x86.c
@@ -1765,6 +1765,7 @@ _emit_code(jit_state_t *_jit)
                abort();
        }
        jit_regarg_clr(node, value);
+       assert(_jitc->regarg == 0);
        /* update register live state */
        jit_reglive(node);
     }



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