[Guile-commits] 143/437: Correct testcases in the mips backend.

[Andy Wingo]

wingo pushed a commit to branch lightning
in repository guile.

commit ee0fab1dae64f2f601dca7c67046bf5dd70ed4db
Author: pcpa <address@hidden>
Date:   Thu Dec 6 07:47:42 2012 -0200

    Correct testcases in the mips backend.
    
        * lib/jit_mips-fpu.c: Correct wrong register order in stxr_{f,d}
        in the mips backend.
---
 ChangeLog          | 5 +++++
 lib/jit_mips-fpu.c | 8 ++++----
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 825d973..f5b3a7c 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
 2012-12-05 Paulo Andrade <address@hidden>
 
+       * lib/jit_mips-fpu.c: Correct wrong register order in stxr_{f,d}
+       in the mips backend.
+
+2012-12-05 Paulo Andrade <address@hidden>
+
        * lib/jit_arm-vfp.c: Correct regression found in armv7l with
        latest test cases.
 
diff --git a/lib/jit_mips-fpu.c b/lib/jit_mips-fpu.c
index 702a703..c4f51c6 100644
--- a/lib/jit_mips-fpu.c
+++ b/lib/jit_mips-fpu.c
@@ -686,8 +686,8 @@ _stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, 
jit_int32_t r2)
 {
     jit_int32_t                reg;
     reg = jit_get_reg(jit_class_gpr);
-    addr(rn(reg), r1, r2);
-    str_f(rn(reg), r0);
+    addr(rn(reg), r0, r1);
+    str_f(rn(reg), r2);
     jit_unget_reg(reg);
 }
 
@@ -916,8 +916,8 @@ _stxr_d(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, 
jit_int32_t r2)
 {
     jit_int32_t                reg;
     reg = jit_get_reg(jit_class_gpr);
-    addr(rn(reg), r1, r2);
-    str_d(rn(reg), r0);
+    addr(rn(reg), r0, r1);
+    str_d(rn(reg), r2);
     jit_unget_reg(reg);
 }