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[Guile-commits] 212/437: Correct remaining test cases, but not yet ones
From: |
Andy Wingo |
Subject: |
[Guile-commits] 212/437: Correct remaining test cases, but not yet ones with stack arguments. |
Date: |
Mon, 2 Jul 2018 05:14:23 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit cee4ccb7d4646b40198e5f369006e96a146f1086
Author: pcpa <address@hidden>
Date: Sat Apr 27 17:58:17 2013 -0300
Correct remaining test cases, but not yet ones with stack arguments.
lib/jit_ia64-cpu.c:
Correct immediate range check of integer comparisons when
inverting arguments.
Correct gei_u that was not decrementing immediate when
inverting arguments.
Correct b?add* and b?sub* that were not properly updating
the result register.
---
ChangeLog | 10 ++++++++++
lib/jit_ia64-cpu.c | 28 ++++++++++++++--------------
2 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/ChangeLog b/ChangeLog
index 76debeb..8813af2 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,15 @@
2013-04-27 Paulo Andrade <address@hidden>
+ lib/jit_ia64-cpu.c:
+ Correct immediate range check of integer comparisons when
+ inverting arguments.
+ Correct gei_u that was not decrementing immediate when
+ inverting arguments.
+ Correct b?add* and b?sub* that were not properly updating
+ the result register.
+
+2013-04-27 Paulo Andrade <address@hidden>
+
* lib/jit_ia64-cpu.c: Correct wrong mapping of 2 instructions
in "M-, stop, M-, stop" translation, that was ignoring the
last stop (implemented as a nop I- stop).
diff --git a/lib/jit_ia64-cpu.c b/lib/jit_ia64-cpu.c
index b64f861..6ffe00d 100644
--- a/lib/jit_ia64-cpu.c
+++ b/lib/jit_ia64-cpu.c
@@ -3844,7 +3844,7 @@ static void
_lti(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
{
jit_int32_t reg;
- if (i0 >= -128 && i0 <= 127)
+ if (i0 >= -127 && i0 <= 128)
CMPI_LT(PR_7, PR_6, i0 - 1, r1);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -3868,7 +3868,7 @@ static void
_lti_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
{
jit_int32_t reg;
- if (i0 >= -128 && i0 <= 127)
+ if (i0 >= -127 && i0 <= 128)
CMPI_LTU(PR_7, PR_6, i0 - 1, r1);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -3952,7 +3952,7 @@ static void
_gei(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
{
jit_int32_t reg;
- if (i0 >= -128 && i0 <= 127)
+ if (i0 >= -127 && i0 <= 128)
CMPI_LT(PR_7, PR_6, i0 - 1, r1);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -3976,8 +3976,8 @@ static void
_gei_u(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1, jit_word_t i0)
{
jit_int32_t reg;
- if (i0 >= -128 && i0 <= 127)
- CMPI_LTU(PR_7, PR_6, i0, r1);
+ if (i0 >= -127 && i0 <= 128)
+ CMPI_LTU(PR_7, PR_6, i0 - 1, r1);
else {
reg = jit_get_reg(jit_class_gpr);
movi(rn(reg), i0);
@@ -4415,7 +4415,7 @@ _blti(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_word_t i1)
{
jit_word_t w;
jit_int32_t reg;
- if (i1 >= -128 && i1 <= 127)
+ if (i1 >= -127 && i1 <= 128)
CMPI_LT(PR_7, PR_6, i1 - 1, r0);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -4445,7 +4445,7 @@ _blti_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_word_t i1)
{
jit_word_t w;
jit_int32_t reg;
- if (i1 >= -128 && i1 <= 127)
+ if (i1 >= -127 && i1 <= 128)
CMPI_LTU(PR_7, PR_6, i1 - 1, r0);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -4551,7 +4551,7 @@ _bgei(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_word_t i1)
{
jit_word_t w;
jit_int32_t reg;
- if (i1 >= -128 && i1 <= 127)
+ if (i1 >= -127 && i1 <= 128)
CMPI_LT(PR_7, PR_6, i1 - 1, r0);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -4581,7 +4581,7 @@ _bgei_u(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_word_t i1)
{
jit_word_t w;
jit_int32_t reg;
- if (i1 >= -128 && i1 <= 127)
+ if (i1 >= -127 && i1 <= 128)
CMPI_LTU(PR_7, PR_6, i1 - 1, r0);
else {
reg = jit_get_reg(jit_class_gpr);
@@ -4750,9 +4750,9 @@ _baddr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_int32_t r1,
ltr(rn(t2), rn(t1), r0); /* t2 = t1 < r0 */
ltr(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
CMPI_EQ(PR_6, PR_7, 0, rn(t0));
- CMPI_EQ_p(PR_8, PR_9, 0, rn(t2), PR_6);/* if (t0==0) p4=t2==0,p5=t2!=0; */
- CMPI_EQ_p(PR_8, PR_9, 0, rn(t2), PR_7);/* if (t0!=0) p4=t1==0,p5=t1!=0; */
- MOV(r0, rn(t0));
+ CMPI_EQ_p(PR_8, PR_9, 0, rn(t2), PR_6);/* if (t0==0) p8=t2==0,p9=t2!=0; */
+ CMPI_EQ_p(PR_8, PR_9, 0, rn(t1), PR_7);/* if (t0!=0) p8=t1==0,p9=t1!=0; */
+ addr(r0, r0, r1);
sync();
w = _jit->pc.w;
BRI_COND((i0 - w) >> 4, carry ? PR_9 : PR_8);
@@ -4827,8 +4827,8 @@ _bsubr(jit_state_t *_jit, jit_word_t i0, jit_int32_t r0,
jit_int32_t r1,
ltr(rn(t1), r0, rn(t1)); /* t1 = r0 < t1 */
CMPI_EQ(PR_6, PR_7, 0, rn(t0));
CMPI_EQ_p(PR_8, PR_9, 0, rn(t2), PR_6);/* if (t0==0) p4=t2==0,p5=t2!=0; */
- CMPI_EQ_p(PR_8, PR_9, 0, rn(t2), PR_7);/* if (t0!=0) p4=t1==0,p5=t1!=0; */
- MOV(r0, rn(t0));
+ CMPI_EQ_p(PR_8, PR_9, 0, rn(t1), PR_7);/* if (t0!=0) p4=t1==0,p5=t1!=0; */
+ subr(r0, r0, r1);
sync();
w = _jit->pc.w;
BRI_COND((i0 - w) >> 4, carry ? PR_9 : PR_8);
- [Guile-commits] 232/437: Correct off by one bug on s390x subi., (continued)
- [Guile-commits] 232/437: Correct off by one bug on s390x subi., Andy Wingo, 2018/07/02
- [Guile-commits] 123/437: Revert change aliasing jit_movi_p to jit_movi_ul., Andy Wingo, 2018/07/02
- [Guile-commits] 248/437: Correct wrong example and mt unsafe code in the arm backend., Andy Wingo, 2018/07/02
- [Guile-commits] 236/437: Correct build and make check on gcc111 - AIX 7.1., Andy Wingo, 2018/07/02
- [Guile-commits] 237/437: Correct build and check on NetBSD amd64., Andy Wingo, 2018/07/02
- [Guile-commits] 213/437: Finish Itanium port, correcting remaining failing test cases., Andy Wingo, 2018/07/02
- [Guile-commits] 253/437: IA64: Correct some wrong checks value range checks., Andy Wingo, 2018/07/02
- [Guile-commits] 254/437: ARM: Correct build when disassembler is disabled., Andy Wingo, 2018/07/02
- [Guile-commits] 251/437: Add code to calculate code buffer size based on devel time information., Andy Wingo, 2018/07/02
- [Guile-commits] 144/437: Add new ldst variant test cases to check base/index register clobber., Andy Wingo, 2018/07/02
- [Guile-commits] 212/437: Correct remaining test cases, but not yet ones with stack arguments.,
Andy Wingo <=
- [Guile-commits] 179/437: Add heuristic code to estimate space and resize if required jit buffer., Andy Wingo, 2018/07/02
- [Guile-commits] 265/437: PPC: Correct wrong ldxi_l simplification in 64 bit mode, Andy Wingo, 2018/07/02
- [Guile-commits] 155/437: Add support to test different/alternate code generation setups., Andy Wingo, 2018/07/02
- [Guile-commits] 241/437: Add fallback logic instead of error if cannot figure __WORDSIZE., Andy Wingo, 2018/07/02
- [Guile-commits] 220/437: Update ia64 port to work on HP-UX., Andy Wingo, 2018/07/02
- [Guile-commits] 247/437: Add the jit_callee_save_p interface and extra register definitions., Andy Wingo, 2018/07/02
- [Guile-commits] 259/437: Correct wrong dates in ChangeLog, Andy Wingo, 2018/07/02
- [Guile-commits] 258/437: MIPS: Correct abi detection., Andy Wingo, 2018/07/02
- [Guile-commits] 261/437: MIPS: Build and pass all test cases on mips64., Andy Wingo, 2018/07/02
- [Guile-commits] 181/437: Correct description of the jmpi instruction., Andy Wingo, 2018/07/02