[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Dotgnu-pnet-commits] CVS: pnet/engine arm_codegen.h,1.1,1.2
From: |
Rhys Weatherley <address@hidden> |
Subject: |
[Dotgnu-pnet-commits] CVS: pnet/engine arm_codegen.h,1.1,1.2 |
Date: |
Wed, 21 May 2003 03:14:08 -0400 |
Update of /cvsroot/dotgnu-pnet/pnet/engine
In directory subversions:/tmp/cvs-serv16471/engine
Modified Files:
arm_codegen.h
Log Message:
Rewrite some of the ARM code generation macros because some ARM processor
variants cannot do 16-bit word loads in one instruction.
Index: arm_codegen.h
===================================================================
RCS file: /cvsroot/dotgnu-pnet/pnet/engine/arm_codegen.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -r1.1 -r1.2
*** arm_codegen.h 4 May 2003 21:45:34 -0000 1.1
--- arm_codegen.h 21 May 2003 07:14:06 -0000 1.2
***************
*** 546,558 ****
#define arm_load_membase_ushort(inst,reg,basereg,imm) \
do { \
! arm_load_membase_either((inst), (reg),
(basereg), (imm), 0); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 16); \
! arm_shift_reg_imm8((inst), ARM_SHR, (reg),
(reg), 16); \
} while (0)
#define arm_load_membase_short(inst,reg,basereg,imm) \
do { \
! arm_load_membase_either((inst), (reg),
(basereg), (imm), 0); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 16); \
arm_shift_reg_imm8((inst), ARM_SAR, (reg),
(reg), 16); \
} while (0)
--- 546,561 ----
#define arm_load_membase_ushort(inst,reg,basereg,imm) \
do { \
! arm_load_membase_byte((inst), ARM_WORK,
(basereg), (imm)); \
! arm_load_membase_byte((inst), (reg), (basereg),
(imm) + 1); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 8); \
! arm_alu_reg_reg((inst), ARM_ORR, (reg), (reg),
ARM_WORK); \
} while (0)
#define arm_load_membase_short(inst,reg,basereg,imm) \
do { \
! arm_load_membase_byte((inst), ARM_WORK,
(basereg), (imm)); \
! arm_load_membase_byte((inst), (reg), (basereg),
(imm) + 1); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 24); \
arm_shift_reg_imm8((inst), ARM_SAR, (reg),
(reg), 16); \
+ arm_alu_reg_reg((inst), ARM_ORR, (reg), (reg),
ARM_WORK); \
} while (0)
***************
*** 644,658 ****
#define arm_load_memindex_ushort(inst,reg,basereg,indexreg) \
do { \
! arm_load_memindex_either((inst), (reg),
(basereg), \
!
(indexreg), 1, 0); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 16); \
! arm_shift_reg_imm8((inst), ARM_SHR, (reg),
(reg), 16); \
} while (0)
#define arm_load_memindex_short(inst,reg,basereg,indexreg) \
do { \
! arm_load_memindex_either((inst), (reg),
(basereg), \
!
(indexreg), 1, 0); \
! arm_shift_reg_imm8((inst), ARM_SHL, (reg),
(reg), 16); \
! arm_shift_reg_imm8((inst), ARM_SAR, (reg),
(reg), 16); \
} while (0)
--- 647,670 ----
#define arm_load_memindex_ushort(inst,reg,basereg,indexreg) \
do { \
! arm_alu_reg_reg((inst), ARM_ADD, ARM_WORK,
(basereg), \
! (indexreg)); \
! arm_alu_reg_reg((inst), ARM_ADD, ARM_WORK,
ARM_WORK, \
! (indexreg)); \
! arm_load_membase_byte((inst), (reg), ARM_WORK,
0); \
! arm_load_membase_byte((inst), ARM_WORK,
ARM_WORK, 1); \
! arm_shift_reg_imm8((inst), ARM_SHL, ARM_WORK,
ARM_WORK, 8); \
! arm_alu_reg_reg((inst), ARM_ORR, (reg), (reg),
ARM_WORK); \
} while (0)
#define arm_load_memindex_short(inst,reg,basereg,indexreg) \
do { \
! arm_alu_reg_reg((inst), ARM_ADD, ARM_WORK,
(basereg), \
! (indexreg)); \
! arm_alu_reg_reg((inst), ARM_ADD, ARM_WORK,
ARM_WORK, \
! (indexreg)); \
! arm_load_membase_byte((inst), (reg), ARM_WORK,
0); \
! arm_load_membase_byte((inst), ARM_WORK,
ARM_WORK, 1); \
! arm_shift_reg_imm8((inst), ARM_SHL, ARM_WORK,
ARM_WORK, 24); \
! arm_shift_reg_imm8((inst), ARM_SAR, ARM_WORK,
ARM_WORK, 16); \
! arm_alu_reg_reg((inst), ARM_ORR, (reg), (reg),
ARM_WORK); \
} while (0)
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Dotgnu-pnet-commits] CVS: pnet/engine arm_codegen.h,1.1,1.2,
Rhys Weatherley <address@hidden> <=