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From: | Marcus D. Leech |
Subject: | Re: [Discuss-gnuradio] Implement a signal processing block in the FPGA of USRP |
Date: | Wed, 08 Aug 2018 19:52:08 -0400 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
On 08/08/2018 07:24 PM, Linda20071
wrote:
https://kb.ettus.com/RFNoC But RFNOC development assumes that you already know Verilog or VHDL, or have some other way of constructing the underlying FPGA code. |
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