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Re: [Discuss-gnuradio] [USRP-users] RFNoC -- Making FPGA design easy fro
From: |
Martin Braun |
Subject: |
Re: [Discuss-gnuradio] [USRP-users] RFNoC -- Making FPGA design easy from GNU Radio |
Date: |
Fri, 05 Dec 2014 10:52:32 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.3.0 |
On 12/04/2014 11:33 PM, Vanush Vaswani wrote:
> How does the system know that the downstream block is on host or FPGA?
We have our own blocks for processing on the FPGA. They handle the
command & control of the FPGA and the transport.
M
>
> On Fri, Dec 5, 2014 at 8:58 AM, Nowlan, Sean
> <address@hidden> wrote:
>>
>>
>>> Ettus Research is very excited to announce the release of RFNoC!
>>
>>
>>
>> […]
>>
>>
>>
>> This is very cool. I’ve been looking forward to working with this
>> development.
>>
>>
>>
>>> Mixing and matching host-based and FPGA-based processing is transparent to
>>> the user, and that processing can scale across multiple FPGAs and devices
>>> across a network
>>
>>
>>
>> Does this imply that I could run a GNU Radio application on a Zedboard, for
>> instance, with the following data flows:
>>
>>
>>
>> (1) GR on Zynq ARM --> Zynq FPGA --> GR on Zynq ARM --> B2x0 RF/radio
>>
>> (2) GR on Zynq ARM --> Zynq FPGA --> GR on Zynq ARM --> X3x0 FPGA --> X3x0
>> RF/radio
>>
>>
>>
>> I think (1) is similar or identical to Jonathon Pendlum’s FPGA filter demo.
>> What I’m more curious about is how easy it is to build a single GR flowgraph
>> that mixes GR processing with FPGAs that live either in Zynq or connected
>> 3x0 series devices. It sounds like this kind of support is an explicit goal
>> of RFNoC.
>>
>>
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>
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