Re: [Discuss-gnuradio] USRP - GNURADIO AGC

[Marcus Müller]

Hi Simone,

to make this short: Yes, you just set the gain using that field, or at
runtime, using the set_gain() method of the USRP source.

Everything you can do with a USRP is usually wrapped in the USRP
source/sink blocks, which are basically "just" wrappers that take the
UHD library (which is the driver for the USRPs) and adapt them to GNU Radio.
As such, there is no "direct" way to modify the digital outputs. This is
by design -- these are largely routed to the daughterboard, in your case
the CBX, to communicate settings and commands (e.g. setting the gain,
changing frequency and so on), so as a user you usually "shouldn't" mess
with them.
You can, nevertheless, just modify the UHD driver, add a daughterboard
sensor interface or the like (by changing the daughterboard interface
source code) that would, upon querying that sensor, issue some change to
the IO ports. I don't recommend this -- a) you'll be on your very own
and b) what would you do with that? most of the lines are routed to and
terminated on the CBX [1], so you'd have to modify the hardware. If I
remember correctly, there is one daughterboard that has an always-on
AGC, the TVRX2, which is a bit of a special-purpose daughterboard, as
non-adjustable AGCs only fit signals that fit the AGC -- ie. which
symbol rate is far enough from the AGC loop bandwidth but which
experience fading at a rate that allows the AGC to do its job.

Getting the signal "before" PGA means you don't want to use the mixer
and filters; that basically means you will have to implement spectrum
sensing in an adjustable pass band yourself, at which point you're
building something that is effectively nearly as complex as the CBX
itself, unless you go for something very simple.

To be honest, unless you have very special needs, using a fast energy
estimator that sets the daughterboard's gain in software on a PC would
clearly be my first step, and modifying/adding hardware would only take
place if that system couldn't fulfill the receiver's needs.
We had a discussion on address@hidden, not too long ago,
about implementing something like that in the FPGA, which would reduce
latency; I can't quite remember the name of that thread, though...

Greetings,
Marcus

[1] http://files.ettus.com/schematics/cbx/CBX.pdf
On 25.07.2014 13:43, Simone Ciccia S210664 wrote:
> Hi at all,
>
> I need to implement an AGC to adapt the signal to the ADC's full dynamics.
> I work with an USRP N210 with CBX-40USRP DAUGHTERBOARD...
>
> I investigated that : 
>
> There is a programmable gain amplifier (PGA) before the ADCs to amplify the
> input signal to utilize the entire input range of the ADCs, in case the
> signal is weak.
> This PGA is software programmable.
>
> Auxiliary Digital I/O Ports:
> The USRP motherboard has high speed 64 bit digital I/O ports. 
> These digital I/O pins are connected to the
> daughterboards interface connecters (RxA, TxA, RxB and TxB).  
> These signals can be controlled from software by reading/writing to special
> FPGA registers and each can be independently configured either as digital
> input or digital output.
> Some of these pins are used to control specific operations on the installed
> daughterboards such as
> controlling the selection of receiving RF input port, in automatic
> transmit/receive mode,
> controlling power supply feeding for different TX and RX parts, synthesizer
> lock detection,...etc.
> It can be also used to implement AGC processing and can be very helpful in
> debugging FPGA
> implementations when connected to a logic analyzer.
>
>
> So, using UHD USRP SINK, the PGA is modified just acting on the field Ch0:
> Gain(dB) ???
> Second, there is some block that allow to extract these Auxiliary Digital
> I/O Ports ???
> Practically I want extract analog data before the PGA to process it
> software...
>
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