using Volk machine: ssse3_64
-- Opening a USRP1 device...
-- Using FPGA clock rate of 64.000000MHz...
Traceback (most recent call last):
File "/home/gnuradio/grc/Project/relays/top_block.py", line 126, in
<module>
tb = top_block()
File "/home/gnuradio/grc/Project/relays/top_block.py", line 62, in
__init__
self.uhd_usrp_source_0.set_center_freq(900e6, 1)
File "/usr/local/lib/python2.7/dist-packages/gnuradio/uhd/uhd_swig.py",
line 1879, in set_center_freq
return _uhd_swig.uhd_usrp_source_sptr_set_center_freq(self, *args)
RuntimeError: vector::_M_range_check
Done
we just tried using single USRP source but we got the error which is shown
above,Is it possible to use a single usrp and single daughter-board at
different frequencies and receive the signal. final_msg_rx.grc
<http://gnuradio.4.n7.nabble.com/file/n41518/final_msg_rx.grc>
for your reference the GRC file is attached
Thanks
-----
Manjusha
--
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