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Re: [Discuss-gnuradio] About "FPGA-ADC/DAC and RF frontend" Latency


From: Ben Hilburn
Subject: Re: [Discuss-gnuradio] About "FPGA-ADC/DAC and RF frontend" Latency
Date: Fri, 3 May 2013 10:32:04 -0700

NaceurElOuni -

I think I'm having trouble understanding your question. I'm not sure what you want to measure, or how you intend to measure it.

For starters, there isn't really a shared concept of 'time' between the FPGA and the analog components. The FPGA operates in terms of clocks... which don't exist on the analog front-end. I suppose you could try to measure it in real-world 'time', but figuring out how to do that would be incredibly hard, and then the instrumentation you would need to do it would be even harder (probably?).

Are you asking about measuring the group delay of the analog components? If that's the case, the throwing everything into a simulator is your best bet.

Anyway, sorry for the confused response. I don't think I'm understanding your question correctly.

Cheers,
Ben


On Wed, May 1, 2013 at 11:36 PM, NaceurElOuni <address@hidden> wrote:
Hi,

I am working on estimating the delay between a Tx and an Rx using a stream
of packets modulated in a BPSK scheme (1 Mb/s) with a pair of N210.
(Sampling of 8 Mbits/s)
I want to know if the latency added by the portion(*) of [ FPGA - DAC - RF
front end to the antenna *2 (Rx Part) ] could be determined for a giving set
of parameters (transmission-reception)

I am interested in estimating the range of this latency (tens? hundreds of
microseconds?)

Then, could this latency be considered as insignifiant versus the latency of
the local network and the latency of Ethernet queue processing
(Encapsulation/Decapsulation). (for eg. both Rx and tx ethernet latency are
fluctuating between 1 to 1.5 msec.)

Another point, how is the latency of the portion (*) varying.

All explanation are appreciated, thank you in advance.



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