Re: [Discuss-gnuradio] USRP2, is that possible to skip the Ethernet and pass data through general purpose (physically accessible) inputs to the FPGA?

[Malihe Ahmadi]

Hi Nick,
Actually  we are using the USRP2 not for a SDR application, but we are 
using it to test our physical layer asynchronous backet based 
communication. For that I have to change the FPGA code and remove the 
interpolation/decimation and replace it with a spreading scheme. for 
that I need to know exactly what is the nature of data I am receiving at 
the FPGA and what is its maximum rate or forget about Ethernet and get a 
separate bus for me to pass the data to the FPGA .
Assuming I want to use Ethernet, let's say I want to send the stream 
'0100001', and I pick DBPSK as the modulation. can you please explain 
what is the relation of the DBPSK modulated data and "GMII_RXD" input to 
the FPGA or "sample" input to the dsp_core_tx? is that FPGA receives 8 
bits per symbol sent over Ethernet?
Also, do you have a ready to use Python code for USRP2 device which 
generates for example a SIN wave at the transmitter and captures it at 
the receives?

Thanks,
Malihe
Nick Foster wrote:
> Malihe,
>
> The USRP2 drivers are designed to abstract the user from the device 
> transport, and in normal use you shouldn't have to concern yourself 
> with the transport layer at all. You provide a stream of data in 
> gnuradio, and the USRP2 provides a stream of data out the device (or 
> vice versa). All the magic that happens between should be transparent. 
> To the user, there is no packetization at all on transmitted data -- 
> discrete Ethernet data packets are buffered in the USRP2 and 
> transmitted seamlessly by the device.
>
> If you are seeing "gaps" in signal when viewed on a scope, you are 
> probably experiencing buffer underruns caused by running at a data 
> rate too fast for your CPU to handle.
>
> Can you explain the problem you are seeing with your device?
>
> Nick
>
> > Date: Wed, 1 Sep 2010 19:07:26 -0600
> > From: address@hidden
> > To: address@hidden
> > Subject: [Discuss-gnuradio] USRP2, is that possible to skip the 
> Ethernet and pass data through general purpose (physically accessible) 
> inputs to the FPGA?
> >
> > Hi,
> >
> > I am using USRP2+RFX2400 board and trying to adapt our packetized
> > communication on the board. As I understand the Ethernet does its own
> > packetization on information data and we don't like that. therefore we
> > are looking into avoid passing our information data to the board 
> through
> > Ethernet. We are also fine to make the configuration values for other
> > peripherals on the board (such as DAC, ADC and daughter boards) 
> fixed so
> > that we still can get away with no Ethernet interface. so we are
> > interested to know if there is a general purpose input bus (at least 5
> > pins) that I can use to pass my data serially to the FPGA. That means I
> > would like to see if it is possible to remove all the Verilog codes in
> > FPGA related to handling the Ethernet interface and get the data I'd
> > like to process through a general purpose input bus (at least 5 pins 
> for
> > clock and serial data input and 3 handshaking signals) instead of
> > Ethernet port. For that reason, I need this general purpose bus to be
> > physically accessible on the board so that I can connect them to a
> > digital signal generator. Do you have any suggestion/recommendation 
> for me?
> >
> > Thanks,
> > Malihe
> >
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