Re: [Discuss-gnuradio] Some USRP2 Questions

[Matt Ettus]

Firas A. wrote:
> But this is not clear in TX path because:
>
> If Max IF Ethernate rate = 100 Mbyte/sec     => Max TX IF bandwidth = 25 MHz
> and if min interpolation = 4 (as you said in your previous email)
> => DAC will get 100 MSPS
>
> But USRP2 DAC is clocked at 400 MHz, so where is the other missing
> interpolation by 4 in the TX chain?
>
>   

The interpolation from 100 MS/s to 400 MS/s happens inside the DAC chip 
itself.  The FPGA talks to the DAC at 100 MS/s just like it talks to the 
ADC at 100 MS/s.  Unless you are doing something fancy, you think of the 
DAC as operating at 100 MS/s. 

The primary reason for the x4 interpolation to 400 MS/s is to simplify 
the analog reconstruction filters.  It also allows for a coarse 
modulation up to 150 MHz, but I don't anticipate that being used very often.

Matt