[Discuss-gnuradio] Filter FIR on FPGA

[tarara]

Hello,
I'm working on FPGA and in particulary on side RX. I want to insert a filter FIR
pass band after the output of ADC and before the input of DDC. The filter is
simulated across MATLAB in particulary across "fdatool" and it is written in
verilog. What's the sampling frequency for this filter FIR? Is correct to
insert this filter?
Thank you very much.

Calogero